Patents by Inventor Ok Min Moon
Ok Min Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10793812Abstract: A method for fabricating an electronic device including a semiconductor memory may include: forming a material layer over a substrate; forming a material pattern by etching the material layer, the etching providing an etch residue on sidewalls of the material pattern; and removing the etch residue, wherein removing of the etch residue includes performing a cleaning process using a cleaning composition including water and a fluorine-containing compound or an amine, and having a pH in a range of 7 to 14.Type: GrantFiled: March 1, 2018Date of Patent: October 6, 2020Assignee: SK hynix Inc.Inventors: Ok-Min Moon, Sang-Soo Kim, Eung-Rim Hwang, Jong-Young Cho
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Publication number: 20180346851Abstract: A method for fabricating an electronic device including a semiconductor memory may include: forming a material layer over a substrate; forming a material pattern by etching the material layer, the etching providing an etch residue on sidewalls of the material pattern; and removing the etch residue, wherein removing of the etch residue includes performing a cleaning process using a cleaning composition including water and a fluorine-containing compound or an amine, and having a pH in a range of 7 to 14.Type: ApplicationFiled: March 1, 2018Publication date: December 6, 2018Inventors: Ok-Min Moon, Sang-Soo Kim, Eung-Rim Hwang, Jong-Young Cho
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Patent number: 8841198Abstract: An isolation layer of a semiconductor device and a process for forming the same is described herein. The isolation layer includes a trench that is defined and formed in a semiconductor substrate. A first liner nitride layer is formed on the surface of the trench and a flowable insulation layer is formed in the trench including the first liner nitride layer. The flowable insulation layer is formed such to define a recess in the trench. A second liner nitride layer is formed on the recess including the flowable insulation layer and the first liner nitride layer. Finally, an insulation layer is formed in the recess on the second liner nitride layer to completely fill the trench.Type: GrantFiled: July 3, 2008Date of Patent: September 23, 2014Assignee: Hynix Semiconductor Inc.Inventors: Hyung Hwan Kim, Kwang Kee Chae, Jong Goo Jung, Ok Min Moon, Young Bang Lee, Sung Eun Park
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Patent number: 8007594Abstract: A method for manufacturing a semiconductor device includes the step of conducting a cleaning process for a wafer formed with copper wiring lines to remove contaminations produced on a back surface of the wafer. The cleaning process is conducted by injecting onto the back surface of the wafer an etchant for removing contaminations and simultaneously injecting onto a front surface of the wafer a reductant containing hydrogen.Type: GrantFiled: July 12, 2010Date of Patent: August 30, 2011Assignee: Hynix Semiconductor Inc.Inventors: Young Bang Lee, Kwang Kee Chae, Ok Min Moon
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Publication number: 20110159694Abstract: A method for fabricating a semiconductor device includes: providing a substrate, forming an insulation layer, an adhesive layer, and a photoresist pattern, etching the adhesive layer using the photoresist pattern as an etch barrier, and wet etching the insulation layer using the etched adhesive layer and the photoresist pattern as etch barriers.Type: ApplicationFiled: July 9, 2010Publication date: June 30, 2011Inventors: Young-Bang Lee, Ok-Min Moon
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Publication number: 20110155180Abstract: A wafer cleaning apparatus and a wafer cleaning method using the same are provided. The wafer cleaning method includes removing an oxide layer, which is formed on a wafer, by performing a dry cleaning process using hydrogen fluoride (HF) gas and ammonia (NH3) gas, and removing a reaction by-product generated during the dry cleaning process by performing a wet cleaning process which sprays a chemical onto the wafer.Type: ApplicationFiled: July 9, 2010Publication date: June 30, 2011Inventors: Ok-Min Moon, Young-Bang Lee
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Publication number: 20110023907Abstract: A method for manufacturing a semiconductor device includes the step of conducting a cleaning process for a wafer formed with copper wiring lines to remove contaminations produced on a back surface of the wafer. The cleaning process is conducted by injecting onto the back surface of the wafer an etchant for removing contaminations and simultaneously injecting onto a front surface of the wafer a reductant containing hydrogen.Type: ApplicationFiled: July 12, 2010Publication date: February 3, 2011Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Young Bang LEE, Kwang Kee CHAE, Ok Min MOON
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Patent number: 7855109Abstract: A method for manufacturing a semiconductor device according to the present invention, comprising the steps of: forming a screen oxide layer over the surface of an active region of a semiconductor substrate in which an isolation structure defining the active region is formed; forming a first recess pattern in the active region and a second recess pattern in the isolation structure by etching a gate forming area in the active region and the isolation structure part extended thereto; removing the screen oxide film and simultaneously expanding the width of the second recess pattern; forming a first insulation dielectric layer over the resultant of the substrate having the second recess pattern with the expanded width so that the first insulation dielectric layer is blocked at the upper end thereof in the first recess pattern and it is deposited along the profile in the second recess pattern; forming a second insulation dielectric layer over the first insulation dielectric layer so that the second recess patter isType: GrantFiled: December 30, 2008Date of Patent: December 21, 2010Assignee: Hynix Semiconductor Inc.Inventors: Hyung Hwan Kim, Kwang Kee Chae, Jong Goo Jung, Ok Min Moon, Young Bang Lee, Sung Eun Park
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Publication number: 20100151656Abstract: A method for manufacturing a semiconductor device according to the present invention, comprising the steps of: forming a screen oxide layer over the surface of an active region of a semiconductor substrate in which an isolation structure defining the active region is formed; forming a first recess pattern in the active region and a second recess pattern in the isolation structure by etching a gate forming area in the active region and the isolation structure part extended thereto; removing the screen oxide film and simultaneously expanding the width of the second recess pattern; forming a first insulation dielectric layer over the resultant of the substrate having the second recess pattern with the expanded width so that the first insulation dielectric layer is blocked at the upper end thereof in the first recess pattern and it is deposited along the profile in the second recess pattern; forming a second insulation dielectric layer over the first insulation dielectric layer so that the second recess patter isType: ApplicationFiled: December 30, 2008Publication date: June 17, 2010Inventors: Hyung Hwan KIM, Kwang Kee CHAE, Jong Goo JUNG, Ok Min MOON, Young Bang LEE, Sung Eun PARK
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Patent number: 7655535Abstract: A method for fabricating a device isolation structure of a semiconductor device includes the steps of forming a pad oxide layer and a pad nitride layer over a semiconductor substrate including a cell region and a dummy region, etching a portion of the pad nitride layer, the pad oxide layer and the semiconductor substrate to form a trench, forming a sidewall oxide layer over the sidewalls of the trench; removing the sidewall oxide layer in the dummy region, forming a silicon nitride layer over the sidewalls of the sidewall oxide layer both in the cell region and in the dummy region, filling the trench with an insulating layer, polishing the insulating layer to expose the pad nitride layer, and removing the pad nitride layer.Type: GrantFiled: December 29, 2006Date of Patent: February 2, 2010Assignee: Hynix Semiconductor Inc.Inventors: Hyo Seob Yoon, Woo Jin Kim, Ok Min Moon, Ji Yong Park
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Publication number: 20090267199Abstract: An isolation layer of a semiconductor device and a process for forming the same is described herein. The isolation layer includes a trench that is defined and formed in a semiconductor substrate. A first liner nitride layer is formed on the surface of the trench and a flowable insulation layer is formed in the trench including the first liner nitride layer. The flowable insulation layer is formed such to define a recess in the trench. A second liner nitride layer is formed on the recess including the flowable insulation layer and the first liner nitride layer. Finally, an insulation layer is formed in the recess on the second liner nitride layer to completely fill the trench.Type: ApplicationFiled: July 3, 2008Publication date: October 29, 2009Inventors: Hyung Hwan KIM, Kwang Kee CHAE, Jong Goo JUNG, Ok Min MOON, Young Bang LEE, Sung Eun PARK
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Patent number: 7410909Abstract: A method of removing an ion implanted photoresist comprises performing first cleaning a semiconductor substrate having the ion implanted photoresist using hot deionized water to which a megasonic process is applied, first rinsing the semiconductor substrate using cold deionized water, drying the semiconductor substrate, removing the ion implanted photoresist, and second cleaning the semiconductor wafer using an SPM solution.Type: GrantFiled: December 28, 2006Date of Patent: August 12, 2008Assignee: Hynix Semiconductor Inc.Inventors: Ji Hye Han, Ok Min Moon, Woo Jin Kim, Hyo Seob Yoon, Ji Yong Park, Kee Joon Oh
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Publication number: 20080003769Abstract: A method for fabricating a device isolation structure of a semiconductor device includes the steps of forming a pad oxide layer and a pad nitride layer over a semiconductor substrate including a cell region and a dummy region, etching a portion of the pad nitride layer, the pad oxide layer and the semiconductor substrate to form a trench, forming a sidewall oxide layer over the sidewalls of the trench; removing the sidewall oxide layer in the dummy region, forming a silicon nitride layer over the sidewalls of the sidewall oxide layer both in the cell region and in the dummy region, filling the trench with an insulating layer, polishing the insulating layer to expose the pad nitride layer, and removing the pad nitride layer.Type: ApplicationFiled: December 29, 2006Publication date: January 3, 2008Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Hyo Seob Yoon, Woo Jin Kim, Ok Min Moon, Ji Yong Park
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Patent number: RE43765Abstract: A method for fabricating a device isolation structure of a semiconductor device includes the steps of forming a pad oxide layer and a pad nitride layer over a semiconductor substrate including a cell region and a dummy region, etching a portion of the pad nitride layer, the pad oxide layer and the semiconductor substrate to form a trench, forming a sidewall oxide layer over the sidewalls of the trench; removing the sidewall oxide layer in the dummy region, forming a silicon nitride layer over the sidewalls of the sidewall oxide layer both in the cell region and in the dummy region, filling the trench with an insulating layer, polishing the insulating layer to expose the pad nitride layer, and removing the pad nitride layer.Type: GrantFiled: January 31, 2012Date of Patent: October 23, 2012Assignee: Hynix Semiconductor Inc.Inventors: Hyo Seob Yoon, Woo Jin Kim, Ok Min Moon, Ji Yong Park