Patents by Inventor Olivier Alain Faynot

Olivier Alain Faynot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD TO MANUFACTURE SILICON QUANTUM ISLANDS AND SINGLE-ELECTRON DEVICES
    Publication number: 20100062587
    Abstract: A method of manufacturing a single-electron transistor device is provided. The method includes forming a thinned region in a silicon substrate, the thinned region offset by a non-selected region. The method also includes forming at least one quantum island from the thinned region by subjecting the thinned region to an annealing process. The non-selected region is aligned with the quantum island and tunnel junctions are formed between the quantum island and the non-selected region. The present invention also includes a single-electron device, and a method of manufacturing an integrated circuit that includes a single-electron device.
    Type: Application
    Filed: November 16, 2009
    Publication date: March 11, 2010
    Applicant: Texas Instruments Incorporated
    Inventors: Christoph Wasshuber, Gabriel George Barna, Olivier Alain Faynot
  • Method of fabricating a combined fully-depleted silicon-on-insulator (FD-SOI) and partially-depleted silicon-on-insulator (PD-SOI) devices
    Patent number: 7198993
    Abstract: A method (100) of forming fully-depleted (90) and partially-depleted (92) silicon-on-insulator (SOI) devices on a single die in an integrated circuit device (2) is disclosed using SOI starting material (4, 6, 8) and a selective epitaxial growth process (110).
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: April 3, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Howard L. Tigelaar, Gabriel G. Barna, Olivier Alain Faynot
  • Method to manufacture silicon quantum islands and single-electron devices
    Patent number: 7122413
    Abstract: The present invention provides a method of manufacturing a single-electron transistor device (100). The method includes forming a thinned region (110) in a silicon substrate (105), the thinned region (110) offset by a non-selected region (115). The method also includes forming at least one quantum island (145) from the thinned region (110) by subjecting the thinned region (110) to an annealing process. The non-selected region (115) is aligned with the quantum island (145) and tunnel junctions (147) are formed between the quantum island (145) and the non-selected region (115). The present invention also includes a single-electron device (200), and a method of manufacturing an integrated circuit (300) that includes a single-electron device (305).
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: October 17, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Christoph Wasshuber, Gabriel George Barna, Olivier Alain Faynot