Patents by Inventor Olivier Causse

Olivier Causse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10027230
    Abstract: In accordance with an embodiment, a DC-DC converter is provided comprising a single regulation loop that drives a control circuit, wherein the control circuit selects between operation in a pulse width modulation operating mode and a pulse frequency modulation operating mode, the single regulation loop including a compensation loop, and wherein biasing of the compensation loop is maintained in response to selecting between the pulse width modulation and the pulse frequency modulation operating modes.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: July 17, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Olivier Causse, Henrique Fernandes
  • Publication number: 20150311801
    Abstract: In accordance with an embodiment, a DC-DC converter is provided comprising a single regulation loop that drives a control circuit, wherein the control circuit selects between operation in a pulse width modulation operating mode and a pulse frequency modulation operating mode, the single regulation loop including a compensation loop, and wherein biasing of the compensation loop is maintained in response to selecting between the pulse width modulation and the pulse frequency modulation operating modes.
    Type: Application
    Filed: July 6, 2015
    Publication date: October 29, 2015
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Olivier Causse, Henrique Fernandes
  • Patent number: 9077242
    Abstract: In accordance with an embodiment, a DC-DC converter is provided comprising a single regulation loop that drives a control circuit, wherein the control circuit selects between operation in a pulse width modulation operating mode and a pulse frequency modulation operating mode, the single regulation loop including a compensation loop, and wherein biasing of the compensation loop is maintained in response to selecting between the pulse width modulation and the pulse frequency modulation operating modes.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: July 7, 2015
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Olivier Causse, Fernandes Henrique
  • Publication number: 20140084886
    Abstract: In accordance with an embodiment, a DC-DC converter is provided comprising a single regulation loop that drives a control circuit, wherein the control circuit selects between operation in a pulse width modulation operating mode and a pulse frequency modulation operating mode, the single regulation loop including a compensation loop, and wherein biasing of the compensation loop is maintained in response to selecting between the pulse width modulation and the pulse frequency modulation operating modes.
    Type: Application
    Filed: September 27, 2012
    Publication date: March 27, 2014
    Inventors: Olivier Causse, Henrique Fernandes
  • Patent number: 8183847
    Abstract: In one embodiment, a power supply controller is configured to turn off a first output transistor but inhibit turning off a second output transistor.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: May 22, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Jose M. Capilla, Olivier Causse
  • Publication number: 20110012578
    Abstract: In one embodiment, a power supply controller is configured to turn off a first output transistor but inhibit turning off a second output transistor.
    Type: Application
    Filed: September 27, 2010
    Publication date: January 20, 2011
    Inventors: Jose M. Capilla, Olivier Causse
  • Patent number: 7843181
    Abstract: A power supply controller (25) is configured to accurately adjust the value of an output voltage of a power supply system (10) responsively to the output voltage increasing to an undesirable value. The controller (25) accurately limits an upper value of the output voltage during a light load condition, and rapidly reduces the value of the output voltage to a desired value. The power supply controller is configured to turn off the first output transistor but inhibit turning off the second output transistor using two different control signals.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: November 30, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Jose M. Capilla, Olivier Causse
  • Patent number: 7728573
    Abstract: A power supply controller (25) is configured to accurately adjust the value of an output voltage of a power supply system (10) responsively to the output voltage increasing to an undesirable value. The controller (25) accurately limits an upper value of the output voltage during a light load condition, and rapidly reduces the value of the output voltage during a light load condition, and different control signals to control the switching of the output transistors facilitates rapidly reducing the output voltage.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: June 1, 2010
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Jose M. Capilla, Olivier Causse
  • Publication number: 20080315853
    Abstract: A power supply controller (25) is configured to accurately adjust the value of an output voltage of a power supply system (10) responsively to the output voltage increasing to an undesirable value. The controller (25) accurately limits an upper value of the output voltage during a light load condition, and rapidly reduces the value of the output voltage during a light load condition, and different control signals to control the switching of the output transistors facilitates rapidly reducing the output voltage.
    Type: Application
    Filed: October 24, 2005
    Publication date: December 25, 2008
    Inventors: Jose M. Capilla, Olivier Causse
  • Patent number: 6831328
    Abstract: The invention concerns an anode voltage sensor of a vertical power component selected from the group consisting of components called thyristor, MOS, IGBT, PMCT, EST, BRT transistor, MOS thyristor, turn-off MOS thyristor, formed by a lightly doped N-type substrate (1) whereof the rear surface (2) having a metallizing coat corresponds to the component anode. Said sensor comprises, on the front surface side, a substrate zone (12) surrounded at least partly by a P-type region with low potential in front of an anode potential, said zone (12) being coated with a metallizing coat (M) in ohmic contact with it, whereon is provided an image of the anode voltage.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: December 14, 2004
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Patrick Austin, Jean-Pierre Laur, Olivier Causse, Marie Breil, Jean-Louis Sanchez, Jean Jalade
  • Publication number: 20030174008
    Abstract: The invention concerns an anode voltage sensor of a vertical power component selected from the group consisting of components called thyristor, MOS, IGBT, PMCT, EST, BRT transistor, MOS thyristor, turn-off MOS thyristor, formed by a lightly doped N-type substrate (1) whereof the rear surface (2) having a metallizing coat corresponds to the component anode. Said sensor comprises, on the front surface side, a substrate zone (12) surrounded at least partly by a P-type region with low potential in front of an anode potential, said zone (12) being coated with a metallizing coat (M) in ohmic contact with it, whereon is provided an image of the anode voltage.
    Type: Application
    Filed: May 16, 2003
    Publication date: September 18, 2003
    Inventors: Patrick Austin, Jean-Pierre Laur, Olivier Causse, Marie Breil, Jean-Louis Sanchez, Jean Jalade
  • Patent number: 6459102
    Abstract: A peripheral structure for a monolithic power device, preferably planar, includes front and rear surfaces, connected respectively to a cathode and an anode, two junctions respectively reverse-biased and forward-biased when a direct and adjacent voltage is respectively applied to the two surfaces and at least an insulating box connecting the front and rear surfaces. The structure is such that when a direct voltage or a reverse voltage is applied, generating equipotential voltage lines, the insulating box enables to distribute the equipotential lines in the substrate.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: October 1, 2002
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Patrick Austin, Jean-Louis Sanchez, Olivier Causse, Marie Breil, Jean-Pierre Laur, Jean Jalade