Abstract: A measurement apparatus comprising a first terminal to receive an input signal of a circuit under test; a second terminal to receive an output signal of the circuit under test. A first and second phase splitter configured to generate a first and second phase signal, I1 and I2, and a first and second quadrature signal, Q1 and Q2. A first and second multiplexer, each coupled to the first terminal and the second terminal and configured to alternately pass the input and output signals of the circuit under test to the inputs of the first and second phase splitters. A double-quadrature mixer having four inputs configured to receive I1, Q1, I2, and Q2, and an output. A calculation unit to determine one or both of a phase shift of the circuit under test and/or a gain of the circuit under test based on the output of the double-quadrature mixer.

Abstract: A phase shifter (100) with controllable attenuation and a method for controlling the phase shifter is disclosed, the phase shifter (100) comprising a plurality of transmission line segments (120, 220) coupled in series, wherein each said transmission line segment (120, 220) comprises an attenuation circuit (130, 230), selectively couplable between a signal line (126, 222) of the transmission line segment (120, 220) and ground to selectively attenuate a signal propagating through the transmission line segment (120, 220). Each transmission line segment (120, 220) is switchable between a first configuration providing a first phase shift for a signal propagating through the transmission line segment (120, 220) and a second configuration providing a second phase shift, greater than said first phase shift, for a signal propagating through the transmission line segment (120, 220).

Abstract: A measurement apparatus comprising a first terminal to receive an input signal of a circuit under test; a second terminal to receive an output signal of the circuit under test. A first and second phase splitter configured to generate a first and second phase signal, I1 and I2, and a first and second quadrature signal, Q1 and Q2. A first and second multiplexer, each coupled to the first terminal and the second terminal and configured to alternately pass the input and output signals of the circuit under test to the inputs of the first and second phase splitters. A double-quadrature mixer having four inputs configured to receive I1, Q1, I2, and Q2, and an output. A calculation unit to determine one or both of a phase shift of the circuit under test and/or a gain of the circuit under test based on the output of the double-quadrature mixer.

Abstract: A measurement apparatus comprising a first terminal to receive an input signal of a circuit under test; a second terminal to receive an output signal of the circuit under test. A first and second phase splitter configured to generate a first and second phase signal, I1 and I2, and a first and second quadrature signal, Q1 and Q2. A first and second multiplexer, each coupled to the first terminal and the second terminal and configured to alternately pass the input and output signals of the circuit under test to the inputs of the first and second phase splitters. A double-quadrature mixer having four inputs configured to receive I1, Q1, I2, and Q2, and an output. A calculation unit to determine one or both of a phase shift of the circuit under test and/or a gain of the circuit under test based on the output of the double-quadrature mixer.

Abstract: An attenuator arrangement comprising at least a first attenuation path configured to couple between a signal processing chain, SPC, and a measurement apparatus; said SPC comprising a first and second SPC terminal, said SPC configured to apply one or both of a gain and phase change on a signal passed between the SPC terminals; said measurement apparatus configured to measure one or both of the gain and the phase change applied by SPC by coupling to and receiving signals from said SPC terminals; wherein one of said first SPC terminal and said second SPC terminal is coupled to the measurement apparatus through said first attenuation path; and wherein the at least first attenuation path of the attenuator arrangement is configured to provide, selectively, for attenuation of the signal to the measurement apparatus to make the signal power of the signals from said SPC terminals more equal.

Abstract: A measurement apparatus comprising a first terminal to receive an input signal of a circuit under test; a second terminal to receive an output signal of the circuit under test. A first and second phase splitter configured to generate a first and second phase signal, I1 and I2, and a first and second quadrature signal, Q1 and Q2. A first and second multiplexer, each coupled to the first terminal and the second terminal and configured to alternately pass the input and output signals of the circuit under test to the inputs of the first and second phase splitters. A double-quadrature mixer having four inputs configured to receive I1, Q1, I2, and Q2, and an output. A calculation unit to determine one or both of a phase shift of the circuit under test and/or a gain of the circuit under test based on the output of the double-quadrature mixer.

Abstract: The present invention relates to a low noise amplifier comprising a transformer, a first amplifier and a feedback resistor, the transformer comprising a primary stage and a secondary stage. The secondary stage is connected to the input of the first amplifier and the output of the first amplifier is connected in series with a feedback resistor and the primary stage of said transformer.

Abstract: A PLL circuit with a series coupling of a charge pump, a loop filter and a voltage-controlled oscillator generating an output frequency (f), the voltage-controlled oscillator including tunable devices controlled by a first control signal generated by the loop filter, the PLL circuit includes a leakage compensation circuit for generating a leakage compensation signal to modify a control of the voltage-controlled oscillator, the leakage compensation signal being indicative for a leakage current in the tunable devices of the voltage-controlled oscillator.

Abstract: A PLL circuit (1) comprising a series coupling of a charge pump (10), a loop filter (20) and a voltage-controlled oscillator (30) generating an output frequency (f), said voltage-controlled oscillator (30) comprising tunable devices (C1, C2, C1?, C2, C3) controlled by a first control signal (Vt1) generated by the loop filter (20), the PLL circuit (1) being characterized in that it further comprises a leakage compensation circuit (40) for generating a leakage compensation signal (IL) to modify a control of the voltage-controlled oscillator (30), the leakage compensation signal (IL) being indicative for a leakage current in the tunable devices of the voltage-controlled oscillator (30).

Abstract: Ordinarily, at least two types of mixer oscillator integrated circuits for tuners have to be used, i.e., one for the symmetrical output mode and one for the asymmetrical output mode. In order to handle both output modes, a tuner includes a switching circuit, whereby, in the asymmetrical mode, one output of the tuner is coupled to ground.

Abstract: The circuit (7, 8, 9, 10) comprises, in addition to the automatic gain control (AGC), a gain reduction means for controlling the gain of an amplifier (8), intended to avoid the desynchronization of the local oscillator (7) controlled by a phase-locked loop comparator (12). This is controlled by a peak detector of the amplified signal situated at the output of the amplifier (8).