Patents by Inventor Olivier FOURQUIN

Olivier FOURQUIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240062032
    Abstract: Provided is a contactless electronic system configured for contactless communications with a reader over an electromagnetic field and comprising a power supply, a current monitor, a processing system comprising a hardware processor configured for performing operations, a dynamic extra current loader and a clock generator, wherein the power supply includes a clamp circuit, and wherein, continuously until the end of an execution phase of said hardware processor. The current monitor is configured for determining the maximal current Imax that can be provided by the power supply to the processing system from the electromagnetic field by comparing a current into the clamp circuit to at least one predetermined threshold. Other embodiments disclosed.
    Type: Application
    Filed: September 30, 2021
    Publication date: February 22, 2024
    Applicant: THALES DIS FRANCE SAS
    Inventors: Benjamin DUVAL, Olivier FOURQUIN, Christophe MOREAUX, Laurent FABRE
  • Patent number: 11880249
    Abstract: Provided is a an electronic system (1) comprising a plurality of sub blocks (21, 22, . . . ), a differential amplifier (3), a voltage regulation loop comprising a first transistor (40) and a variable resistor (5), and a plurality of additional transistors (41, 42, . . . ). The input reference voltage (VRF) and the variable resistor are configured such that a first sub block (21) is supplied with its required power supply output voltage (VDD1) by the transistor to which it is connected. The amplifier is configured to output on each of its outputs a power supply reference voltage (VG1, VG2 . . . ) such that each sub block (22, . . . ) other than the first sub block is supplied with its required power supply output voltage (VDD2 . . . ) by the transistor to which it is connected.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: January 23, 2024
    Assignee: THALES DIS FRANCE SAS
    Inventors: Benjamin Duval, Olivier Fourquin, Frederic Demolli
  • Publication number: 20230344656
    Abstract: Provided is a method for generating a physical unclonable function PUF response by a PUF circuit of an electronic device, said PUF circuit comprising pairs of electronic components called PUF primitives implementing said physical unclonable function, by obtaining a challenge (S1), generating PUF output bits (S2) by applying said physical unclonable function to said obtained challenge, and generating said PUF response (S3) from said generated PUF output bits verifying ? > ?? +|T| or ? < -?? -|T| with ?? a predetermined threshold. In some embodiments it maximizes a PUF response entropy based only on the analog differential values generated by the comparators of the electronic device. Other embodiments disclosed.
    Type: Application
    Filed: November 17, 2021
    Publication date: October 26, 2023
    Applicant: THALES DIS FRANCE SAS
    Inventors: Benjamin DUVAL, Alexandre BERZATI, Olivier FOURQUIN
  • Publication number: 20230327891
    Abstract: Provided is an electronic device and a method thereof for repairing response bits of a physical unclonable function of an electronic device, said physical unclonable function outputting said response bits and additional output bits. The method includes generating a PUF response from said response bits (S1), detecting an error in the PUF response (S2), determining erroneous response bits of the PUF response (S3), determining a match (S4) between each determined erroneous response bit and a selected additional output bit such that replacing the erroneous response bits by the matching additional output bits corrects the error in the PUF response, storing said determined match in a repair list (S5), and replacing (S6) in the PUF response said erroneous response bits with the matching additional output bits in the repair list. Other embodiments disclosed.
    Type: Application
    Filed: September 17, 2021
    Publication date: October 12, 2023
    Applicant: THALES DIS FRANCE SAS
    Inventors: Benjamin DUVAL, Alexandre BERZATI, Olivier FOURQUIN
  • Patent number: 11706040
    Abstract: A method of identifying primitives for implementing a physical unclonable function providing a response representative of a device comprising a plurality of primitives coupled in pairs, said primitives being configured for being one-time programmable through application of a burning energy to said primitives, by selecting a subset of the pairs, assessing a difference between electrical characteristics values provided by primitives belonging to each pair of said subset, qualifying all pairs of primitives for which the assessed difference is higher than a reference threshold, and identifying said qualified pairs of primitives comprising programming at least one primitive of each pair of primitives for which the assessed difference is lower than said reference threshold, by applying a burning energy to said at least one primitive so as to differentiate qualified pairs of primitives from those that are not qualified.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: July 18, 2023
    Assignee: THALES DIS FRANCE SAS
    Inventors: Olivier Fourquin, Alexandre Berzati, Benjamin Duval
  • Publication number: 20230152869
    Abstract: Provided is a an electronic system (1) comprising a plurality of sub blocks (21, 22, . . . ), a differential amplifier (3), a voltage regulation loop comprising a first transistor (40) and a variable resistor (5), and a plurality of additional transistors (41, 42, . . . ). The input reference voltage (VRF) and the variable resistor are configured such that a first sub block (21) is supplied with its required power supply output voltage (VDD1) by the transistor to which it is connected. The amplifier is configured to output on each of its outputs a power supply reference voltage (VG1, VG2 . . . ) such that each sub block (22, . . . ) other than the first sub block is supplied with its required power supply output voltage (VDD2 . . . ) by the transistor to which it is connected.
    Type: Application
    Filed: September 30, 2020
    Publication date: May 18, 2023
    Applicant: THALES DIS DESIGN SERVICES SAS
    Inventors: Benjamin DUVAL, Olivier FOURQUIN, Frederic DEMOLLI
  • Publication number: 20230016826
    Abstract: Provided is a contactless electronic system configured for contactless communications with a reader over an electromagnetic field and comprising a power supply, a current monitor, a processing system comprising a hardware processor configured for performing operations, a dynamic extra current loader and a clock generator. The current monitor is configured for determining maximal current Imax that can be provided by the power supply to the processing system from the electromagnetic field, and is configured for comparing, during an execution phase of said hardware processor, said determined maximal current Imax and a current drawn by the processing system.
    Type: Application
    Filed: December 4, 2020
    Publication date: January 19, 2023
    Applicant: THALES DIS DESIGN SERVICES SAS
    Inventors: Benjamin DUVAL, Olivier FOURQUIN, Christophe MOREAUX, Laurent FABRE
  • Patent number: 11323256
    Abstract: A method, cryptographic device, and computer readable memory with instructions, for generating a cryptographic key from at least one prime number, by performing during runtime of the cryptographic device by obtaining from memory a challenge and at least one associated increment number, generating a seed by applying a Physically Unclonable function to said obtained challenge, generating at least one prime number from said generated seed by performing said cryptographic prime numbers generation algorithm and by performing therein as many incrementation steps as said obtained at least one increment number, and generating the cryptographic key from the generated prime number.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: May 3, 2022
    Assignee: THALES DIS DESIGN SERVICES SAS
    Inventors: Olivier Fourquin, Alexandre Berzati, Benjamin Duval
  • Publication number: 20220029835
    Abstract: A method of identifying primitives for implementing a physical unclonable function providing a response representative of a device comprising a plurality of primitives coupled in pairs, said primitives being configured for being one-time programmable through application of a burning energy to said primitives, by selecting a subset of the pairs, assessing a difference between electrical characteristics values provided by primitives belonging to each pair of said subset, qualifying all pairs of primitives for which the assessed difference is higher than a reference threshold, and identifying said qualified pairs of primitives comprising programming at least one primitive of each pair of primitives for which the assessed difference is lower than said reference threshold, by applying a burning energy to said at least one primitive so as to differentiate qualified pairs of primitives from those that are not qualified.
    Type: Application
    Filed: December 5, 2019
    Publication date: January 27, 2022
    Inventors: Olivier FOURQUIN, Alexandre BERZATI, Benjamin DUVAL
  • Publication number: 20210243021
    Abstract: A method, cryptographic device, and computer readable memory with instructions, for generating a cryptographic key from at least one prime number, by performing during runtime of the cryptographic device by obtaining from memory a challenge and at least one associated increment number, generating a seed by applying a Physically Unclonable function to said obtained challenge, generating at least one prime number from said generated seed by performing said cryptographic prime numbers generation algorithm and by performing therein as many incrementation steps as said obtained at least one increment number, and generating the cryptographic key from the generated prime number.
    Type: Application
    Filed: April 24, 2019
    Publication date: August 5, 2021
    Inventors: Olivier FOURQUIN, Alexandre BERZATI, Benjamin DUVAL