Patents by Inventor Om Prakash Agrawal

Om Prakash Agrawal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Configurable logic array including lookup table means for generating functions of different numbers of input terms
    Patent number: 6567969
    Abstract: A programmable integrated circuit includes configurable logic blocks (CLB's), in which lookup tables are sandwiched between input multiplexing means and output multiplexing means such that the lookup tables can be used for implementing logic functions of different numbers of lookup input terms.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: May 20, 2003
    Assignee: Lattice Semiconductor Corporation
    Inventors: Om Prakash Agrawal, Michael James Wright, Ju Shen
  • Configurable logic array including IOB to longlines interconnect means for providing selectable access to plural longlines from each IOB (input/output block)
    Patent number: 6128770
    Abstract: A programmable integrated circuit includes configurable logic blocks (CLB's), configurable input/output blocks (IOB's) and a configurable interconnect network for providing program-defined routing of signals between the CLB's and IOB's. A selector is provided with each of peripherally distributed IOB's of each row or column for selecting an output signal from plural one of long lines that extend perpendicularly relative to the peripheral boundary at which the IOB resides.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: October 3, 2000
    Assignee: Vantis Corporation
    Inventors: Om Prakash Agrawal, Michael James Wright, Ju Shen
  • Logic device (PLD) having direct connections between configurable logic blocks (CLBs) and configurable input/output blocks (IOBs)
    Patent number: 5740069
    Abstract: A programmable integrated circuit includes configurable logic blocks (CLB's), configurable input/output blocks (IOB's) and an interconnect network for providing program-defined routing of signals between the CLB's and IOB's. The interconnect network includes direct connect means for providing programmably-selectable, dedicated connections between a first CLB and one or more adjacent CLBs and further between a first CLB and one or more CLBs. The interconnect network also includes peripheral direct connect means for providing programmably-selectable, dedicated connections between a first configurable IOB and first and second CLBs.
    Type: Grant
    Filed: August 16, 1996
    Date of Patent: April 14, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Om Prakash Agrawal, Michael James Wright, Ju Shen