Patents by Inventor Osamu Hidaka
Osamu Hidaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7948358Abstract: In a vehicle anti-theft system including an immobilizer system and a keyless entry system provided adjacent to a key cylinder, an immobilizer system antenna (5) is insert molded in an annular member (3) surrounding a key opening (2) of the key cylinder and a keyless entry system antenna (9) is incorporated in a housing (6, 7) which is integrally formed with the annular member. Thereby, the immobilizer system antenna and keyless entry system antenna can be accommodated in a common unit while suitably spacing them away from each other. Therefore, without requiring any special shielding arrangement, the two antennal can perform favorably while the overall size of the system can be minimized.Type: GrantFiled: May 9, 2006Date of Patent: May 24, 2011Assignee: Kabushiki Kaisha Honda LockInventors: Osamu Hidaka, Kimiharu Mishima, Makoto Honkawa
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Patent number: 7931314Abstract: A vehicle door outer handle system is provided in which a pair of electrodes and a circuit board on which is provided a detection circuit for detecting a change in capacitance between the electrodes are housed within an operating handle formed from a handle main body and a cover covering the outer side of the handle main body, the operating handle being disposed on an outer side of a vehicle door, and the electrodes (43) being patterned on the circuit board (44), the operating handle thereby being made thin.Type: GrantFiled: June 18, 2004Date of Patent: April 26, 2011Assignee: Kabushiki Kaisha Honda LockInventors: Masakatsu Nitawaki, Hiroto Fujiwara, Osamu Hidaka, Yuho Otsuta, Masahiko Sueyoshi
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Patent number: 7795657Abstract: A semiconductor memory device includes a memory cell portion, the memory cell portion including a ferroelectric capacitor and a memory cell transistor, the ferroelectric capacitor including a first electrode film on a semiconductor substrate, a second electrode film over the first electrode film, and a ferroelectric film between the first and second electrode films, and the memory cell transistor including a source and a drain between the first and second electrode films, wherein either the source or the drain connects to the first electrode film, and the other of the source or the drain connects to the second electrode film.Type: GrantFiled: July 2, 2007Date of Patent: September 14, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Osamu Hidaka
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Patent number: 7446362Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.Type: GrantFiled: November 16, 2007Date of Patent: November 4, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Osamu Hidaka, Iwao Kunishima, Hiroyuki Kanaya
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Patent number: 7429508Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.Type: GrantFiled: November 16, 2007Date of Patent: September 30, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Osamu Hidaka, Iwao Kunishima, Hiroyuki Kanaya
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Patent number: 7402858Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.Type: GrantFiled: November 16, 2007Date of Patent: July 22, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Osamu Hidaka, Iwao Kunishima, Hiroyuki Kanaya
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Publication number: 20080073684Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.Type: ApplicationFiled: November 16, 2007Publication date: March 27, 2008Inventors: Osamu Hidaka, Iwao Kunishima, Hiroyuki Kanaya
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Publication number: 20080076192Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.Type: ApplicationFiled: November 16, 2007Publication date: March 27, 2008Inventors: Osamu Hidaka, Iwao Kunishima, Hiroyuki Kanaya
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Publication number: 20080073683Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.Type: ApplicationFiled: November 16, 2007Publication date: March 27, 2008Inventors: Osamu HIDAKA, Iwao Kunishima, Hiroyuki Kanaya
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Publication number: 20080061333Abstract: According to an aspect of the present invention, there is provided a semiconductor memory device, comprising a memory cell portion, the memory cell portion having a ferroelectric capacitor and a memory cell transistor, the ferroelectric capacitor having a plurality of electrode films and a ferroelectric film, the plurality of electrode films being stacked in layer on a semiconductor substrate, the ferroelectric film being formed between the plurality of electrode films, a source and a drain of the memory cell transistor being formed between the electrode films, the source and the drain directly contacting the ferroelectric film or indirectly contacting the ferroelectric film via an insulator, one of the source and the drain being connected to one end of the electrode film, the other of the source and the drain being connected to the other end of the electrode film.Type: ApplicationFiled: July 2, 2007Publication date: March 13, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Osamu Hidaka
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Patent number: 7339218Abstract: A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first insulating film formed on the semiconductor substrate in the first and second regions and on the transistor, a first ferroelectric capacitor formed on the first insulating film in the first region and electrically connected to the transistor, a hydrogen barrier film formed above the first ferroelectric capacitor and above the first insulating film in the first and second regions, a first contact penetrating the hydrogen barrier film in the first region and electrically connected to the first ferroelectric capacitor, and a second contact which penetrates the hydrogen barrier film in the second region and which is in a floating state.Type: GrantFiled: July 8, 2004Date of Patent: March 4, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Osamu Hidaka, Iwao Kunishima, Hiroyuki Kanaya
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Publication number: 20070272959Abstract: A method of manufacturing a ferroelectric memory cell includes: forming device isolation regions; and source/drain regions; forming a gate insulating film on the semiconductor substrate; forming a gate electrode on the gate insulating film; forming; forming a contact plug to be connected to one of the source/drain regions. The method further includes: forming a lower electrode to be connected to the contact plug; depositing a sol-gel solution containing a ferroelectric minute crystal on the lower electrode to form a ferroelectric film; forming an upper electrode on the ferroelectric film; forming a second interlayer insulating film. The method further includes: forming a capacitor contact plug to be connected to the upper electrode; forming a substrate contact plug to be connected to the other one of the source/drain regions; and forming first and second wiring layers to be connected to the capacitor contact plug and the substrate contact plug, respectively.Type: ApplicationFiled: May 24, 2007Publication date: November 29, 2007Inventors: Osamu Hidaka, Iwao Kunishima
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Patent number: 7217899Abstract: A vehicle door outer handle system includes: an operating handle formed from a handle main body and a cover covering the outer side of the handle main body; a pair of electrodes; and a circuit board on which a detection circuit is provided for detecting a change in capacitance between the electrodes; the electrodes and the circuit board being housed within the operating handle. The electrodes are patterned on the circuit board, and a ground pattern connected to the detection circuit is formed so as to be disposed at a position offset from the electrodes if viewed through the circuit board.Type: GrantFiled: March 8, 2005Date of Patent: May 15, 2007Assignees: Kabushiki Kaisha Honda Lock, Honda Motor Co., Ltd.Inventors: Osamu Hidaka, Yuho Otsuta, Masahiko Sueyoshi, Hideaki Arai, Akira Kamikura
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Publication number: 20070096180Abstract: A semiconductor device includes a semiconductor substrate, and a ferroelectric capacitor provided on the semiconductor substrate, the ferroelectric capacitor comprising a lower electrode, a first ferroelectric film provided on the lower electrode including Pb(ZrxTi1-x)O3 and having a tetragonal crystal system whose crystal direction is oriented in a <111> direction, a second ferroelectric film provided on the first ferroelectric film including Pb(ZryTi1-y)O3 and having a tetragonal crystal system whose crystal direction is oriented in the <111> direction, and an upper electrode provided on the second ferroelectric film.Type: ApplicationFiled: September 21, 2006Publication date: May 3, 2007Inventors: Koji Yamakawa, Soichi Yamazaki, Osamu Hidaka, Osamu Arisumi
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Publication number: 20070091627Abstract: A vehicle door outer handle system is provided in which a pair of electrodes and a circuit board on which is provided a detection circuit for detecting a change in capacitance between the electrodes are housed within an operating handle formed from a handle main body and a cover covering the outer side of the handle main body, the operating handle being disposed on an outer side of a vehicle door, and the electrodes (43) being patterned on the circuit board (44), the operating handle thereby being made thin.Type: ApplicationFiled: June 18, 2004Publication date: April 26, 2007Inventors: Masakatsu Nitawaki, Hiroto Fujiwara, Osamu Hidaka, Yuho Otsuta, Masahiko Sueyoshi
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Publication number: 20060290468Abstract: In a vehicle anti-theft system including an immobilizer system and a keyless entry system provided adjacent to a key cylinder, an immobilizer system antenna (5) is insert molded in an annular member (3) surrounding a key opening (2) of the key cylinder and a keyless entry system antenna (9) is incorporated in a housing (6, 7) which is integrally formed with the annular member. Thereby, the immobilizer system antenna and keyless entry system antenna can be accommodated in a common unit while suitably spacing them away from each other.Type: ApplicationFiled: May 9, 2006Publication date: December 28, 2006Applicant: Kabushiki Kaisha Honda LockInventors: Osamu Hidaka, Kimiharu Mishima, Makoto Honkawa
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Publication number: 20060231880Abstract: According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, and a capacitor formed above the semiconductor substrate by sandwiching a dielectric film between a lower electrode and upper electrode, wherein the upper electrode has a stacked structure including a first MOx type conductive oxide film (M is a metal element, O is an oxygen element, and x>0) having a crystal structure, and a crystal grain size of the first MOx type conductive oxide film is 5 to 100 nm.Type: ApplicationFiled: April 7, 2006Publication date: October 19, 2006Inventors: Koji Yamakawa, Soichi Yamazaki, Osamu Hidaka
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Publication number: 20060172136Abstract: A coated member includes a resinous substrate, a primer layer, and a hard coat layer. The primer layer is formed on a surface of the resinous substrate, and is composed of a resinous primer. The hard coat layer is formed on the primer layer, and contains a flexibility-imparting agent. At least one of the primer layer and the hard coat layer further contains an ultraviolet ray-absorbing agent. The coated member exhibits good weatherability, adhesiveness and crack resistance.Type: ApplicationFiled: January 31, 2006Publication date: August 3, 2006Inventors: Takashi Komori, Hisashi Muramatsu, Osamu Hidaka, Kenichi Yasunaga, Takayuki Nagai, Masaaki Yamaya, Koichi Higuchi
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Patent number: 6982453Abstract: A semiconductor device having a semiconductor substrate; an insulating film formed on said semiconductor substrate; a ferroelectric capacitor having a lower electrode, a ferroelectric film and an upper electrode which are stacked sequentially on the insulating film; a first hydrogen barrier film; a first inter-layer insulating film covering said ferroelectric capacitor; and a second inter-layer insulating film stacked on the first inter-layer insulating film, the first hydrogen barrier film being interposed between the first and second interlayer insulating films is proposed.Type: GrantFiled: June 25, 2003Date of Patent: January 3, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Hiroyuki Kanaya, Toyota Morimoto, Osamu Hidaka, Yoshinori Kumura, Iwao Kunishima, Tsuyoshi Iwamoto
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Publication number: 20050236846Abstract: A vehicle door outer handle system includes: an operating handle formed from a handle main body and a cover covering the outer side of the handle main body; a pair of electrodes; and a circuit board on which a detection circuit is provided for detecting a change in capacitance between the electrodes; the electrodes and the circuit board being housed within the operating handle. The electrodes are patterned on the circuit board, and a ground pattern connected to the detection circuit is formed so as to be disposed at a position offset from the electrodes if viewed through the circuit board.Type: ApplicationFiled: March 8, 2005Publication date: October 27, 2005Applicants: Kabushiki Kaisha Honda Lock, Honda Motor Co., Ltd.Inventors: Osamu Hidaka, Yuho Otsuta, Masahiko Sueyoshi, Hideaki Arai, Akira Kamikura