Patents by Inventor Osamu Kubo
Osamu Kubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240161925Abstract: A learning device 1X mainly includes a first acquisition means 31X, a second acquisition means 32X, and a learning means 34X. The first acquisition means 31X acquires a partial waveform of electrocardiogram data regarding an electrocardiogram of a subject. The second acquisition means 32X acquires an attention interval, which is used as a basis for a diagnosis of a target disease, in a sequential waveform of the electrocardiogram data. The learning means 34X trains a model configured to diagnose the target disease, based on the partial waveform and the attention interval.Type: ApplicationFiled: October 3, 2023Publication date: May 16, 2024Applicant: NEC CorporationInventors: Yuan LUO, Mitsuru NOMA, Osamu HISAMATSU, Kosuke NISHIHARA, Masahiro KUBO, Hiroaki KATAOKA, Akihiko SHIBANO
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Publication number: 20230037538Abstract: The present invention relates to compounds expected to be useful in the prevention and/or treatment of diseases such as amyotrophic lateral sclerosis, frontotemporal dementia, chronic traumatic encephalopathy, Alzheimer's disease, frontotemporal lobar degeneration, multisystem proteinopathy and the like, a method for preventing or treating such diseases, and the like.Type: ApplicationFiled: June 23, 2022Publication date: February 9, 2023Inventors: Dennis Solas, Anatoliy Kitaygorodskyy, Kumar Paulvannan, Vishwanath R. Lingappa, Masato Yoshikawa, Masahiro Ito, Yuta Tanaka, Keiko Kakegawa, Tomohiro Ohashi, Takuto Kojima, Akinori Toita, Osamu Kubo, Fumiaki Kikuchi, Florian Pünner, Junsi Wang
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Publication number: 20220370491Abstract: The object of the present invention is to provide a nucleic acid agent that is efficiently delivered to the nervous system, for example, the central nervous system to which drug delivery can be prevented by BBB, and produces an antisense effect on the target transcriptional product at the delivery site, and a composition comprising the same. In an embodiment, the present invention provides a double-stranded nucleic acid complex formed by annealing a first nucleic acid strand that hybridizes to a part of a target transcriptional product and has an antisense effect on the target transcriptional product, and a second nucleic acid strand that comprises a base sequence complementary to the first nucleic acid strand and is bound to a C22-35 alkyl group optionally substituted with a hydroxy group or an analog thereof.Type: ApplicationFiled: September 16, 2020Publication date: November 24, 2022Applicants: National University Corporation Tokyo Medical and Dental University, Takeda Pharmaceutical Company LimitedInventors: Takanori Yokota, Testuya Nagata, Hideki Furukawa, Takatoshi Yogo, Yasuo Nakagawa, Shigekazu Sasaki, Ryosuke Tokunoh, Tomohiro Seki, Kosuke Hidaka, Fumiaki Kikuchi, Osamu Kubo, Takahito Kasahara, Takuto Kojima, Junsi Wang, Norihito Tokunaga
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Publication number: 20220098180Abstract: The present invention provides a heterocyclic compound having a HDAC inhibitory action, which is useful for the treatment of central nervous system diseases including neurodegenerative diseases, and the like, and a medicament comprising the compound. The present invention relates to a compound represented by the formula (I): wherein each symbol is as described in the description, or a salt thereof.Type: ApplicationFiled: January 29, 2020Publication date: March 31, 2022Applicant: Takeda Pharmaceutical Company LimitedInventors: Masahiro ITO, Takeshi YAMAMOTO, Keiko KAKEGAWA, Hideyuki SUGIYAMA, Tohru MIYAZAKI, Yasuyoshi ARIKAWA, Tomohiro OKAWA, Jinichi YONEMORI, Osamu KUBO, Akinori TOITA, Takuto KOJIMA, Fumiaki KIKUCHI, Minoru SASAKI, Misaki HOMMA, Yasuhiro IMAEDA, Hironobu MAEZAKI, Shiinobu SASAKI, Ayumu SATO, Hirotaka KAMITANI, Yasutomi ASANO, Hironori KOKUBO, Masato YOSHIKAWA
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Publication number: 20220089525Abstract: A heterocyclic compound that can have an antagonistic action on an NMDA receptor containing the NR2B subunit, and is expected to be useful as a prophylactic or therapeutic agent for depression, bipolar disorder, migraine, pain, peripheral symptoms of dementia and the like is provided. A compound represented by the formula (I): wherein each symbol is as described in the DESCRIPTION, or a salt thereof.Type: ApplicationFiled: January 23, 2020Publication date: March 24, 2022Applicant: TAKEDA PHARMACEUTICAL COMPANY LIMITEDInventors: Yuya OGURO, Makoto KAMATA, Satoshi MIKAMI, Shinji MORIMOTO, Sachie TAKASHIMA, Masaki DAINI, Osamu KUBO, Fumiaki KIKUCHI, Akinori TOITA, Florian PUENNER, Takahito KASAHARA, Masataka MURAKAMI, Shuhei IKEDA, Fumie YAMAGUCHI, Minoru NAKAMURA, Takafumi YUKAWA
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Patent number: 10435399Abstract: The present invention provides a heterocyclic compound having a HDAC inhibitory action, and useful for the treatment of central nervous system diseases including neurodegenerative disease, and the like, and a medicament comprising the compound. The present invention relates to a compound represented by the formula (I): wherein each symbol is as defined in the specification, or a salt thereof.Type: GrantFiled: July 30, 2018Date of Patent: October 8, 2019Assignee: Takeda Pharmaceutical Company LimitedInventors: Masahiro Ito, Hideyuki Sugiyama, Osamu Kubo, Fumiaki Kikuchi, Takeshi Yasui, Keiko Kakegawa, Zenichi Ikeda, Tohru Miyazaki, Yasuyoshi Arikawa, Tomohiro Okawa, Jinichi Yonemori, Akinori Toita, Takuto Kojima, Yasutomi Asano, Ayumu Sato, Hironobu Maezaki, Shinobu Sasaki, Hironori Kokubo, Misaki Homma, Minoru Sasaki, Yasuhiro Imaeda
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Publication number: 20190135799Abstract: The present invention provides a heterocyclic compound having a HDAC inhibitory action, and useful for the treatment of central nervous system diseases including neurodegenerative disease, and the like, and a medicament comprising the compound. The present invention relates to a compound represented by the formula (I): wherein each symbol is as defined in the specification, or a salt thereof.Type: ApplicationFiled: July 30, 2018Publication date: May 9, 2019Inventors: Masahiro ITO, Hideyuki SUGIYAMA, Osamu KUBO, Fumiaki KIKUCHI, Takeshi YASUI, Keiko KAKEGAWA, Zenichi IKEDA, Tohru MIYAZAKI, Yasuyoshi ARIKAWA, Tomohiro OKAWA, Jinichi YONEMORI, Akinori TOITA, Takuto KOJIMA, Yasutomi ASANO, Ayumu SATO, Hironobu MAEZAKI, Shinobu SASAKI, Hironori KOKUBO, Misaki HOMMA, Minoru SASAKI, Yasuhiro IMAEDA
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Patent number: 8575167Abstract: The present invention aims to provide a novel SCD inhibitor. The present invention relate to SCD inhibitor comprising A compound represented by the formula (I) wherein R is an optionally substituted cyclic group or an optionally substituted carbamoyl group, provided that R is not an optionally substituted 7-pyrido[2,3-d]pyrimidyl group; ring A is an optionally further substituted pyridazine ring; R1, R2, R3, R4, R11, R12, R13 and R14 are each independently a hydrogen atom or a substituent, or R1 and R11 in combination, R2 and R12 in combination, R3 and R13 in combination, or R4 and R14 in combination optionally form an oxo group, or R2 and R4 in combination optionally form a bond or an alkylene cross-linkage; m and n are each independently an integer of 0 to 2; ring B is an optionally substituted ring, provided that the two atoms constituting ring B, which are adjacent to the spiro carbon atom, are not oxygen atoms at the same time, or a salt thereof, or a prodrug thereof.Type: GrantFiled: February 5, 2008Date of Patent: November 5, 2013Assignee: Takeda Pharmaceutical Company LimitedInventors: Takahiko Taniguchi, Kenichi Miyata, Osamu Kubo
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Publication number: 20100069351Abstract: The present invention aims to provide a novel SCD inhibitor. The present invention relate to SCD inhibitor comprising A compound represented by the formula (I) wherein R is an optionally substituted cyclic group or an optionally substituted carbamoyl group, provided that R is not an optionally substituted 7-pyrido[2,3-d]pyrimidyl group; ring A is an optionally further substituted pyridazine ring; R1, R2, R3, R4, R11, R12, R13 and R14 are each independently a hydrogen atom or a substituent, or R1 and R11 in combination, R2 and R12 in combination, R3 and R13 in combination, or R4 and R14 in combination optionally form an oxo group, or R2 and R4 in combination optionally form a bond or an alkylene cross-linkage; m and n are each independently an integer of 0 to 2; ring B is an optionally substituted ring, provided that the two atoms constituting ring B, which are adjacent to the spiro carbon atom, are not oxygen atoms at the same time, or a salt thereof, or a prodrug thereof.Type: ApplicationFiled: February 5, 2008Publication date: March 18, 2010Inventors: Takahiko Taniguchi, Kenichi Miyata, Osamu Kubo
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Publication number: 20090325956Abstract: The present invention provides a novel SCD inhibitor. An SCD inhibitor containing a compound represented by the formula [I] wherein ring A is an optionally substituted aromatic ring, ring B is an optionally substituted ring, ring C is an optionally substituted aromatic ring, R is a hydrogen atom, an optionally substituted hydrocarbon group or an optionally substituted heterocyclic group, and X is a spacer having 1 to 5 atoms in the main chain, or a salt thereof, or a prodrug thereof.Type: ApplicationFiled: October 12, 2007Publication date: December 31, 2009Inventors: Takahiko Taniguchi, Kenichi Miyata, Osamu Kubo, Junji Matsui
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Publication number: 20090099976Abstract: An optimal portfolio determining method enables high speed determination of objective financial product which optimize availability for institutional buyer or retail investor and purchasing amount on the basis of information relating to earning rate or the like of individual name and information relating to information factors influencing for earning rate, and a system for realizing the method.Type: ApplicationFiled: September 29, 2008Publication date: April 16, 2009Inventors: Shigeru Kawamoto, Yasuhiro Kobayashi, Masanori Takamoto, Osamu Kubo, Takeshi Yokota, Yuuji Ide
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Patent number: 7371687Abstract: An electronic circuit device has a high-density mount board (2), on which are disposed a microcomputer (3) and random access memory (7) which are connected to each other through an exclusive memory bus (12) for high-speed data transfer, a programmable device (8) which is a variable logic circuit represented by FPGA, and an electrically-rewritable nonvolatile memory (16) which can store the operation program of the microcomputer. The high-density mount board has external mounting pins on the bottom surface so that it can be mounted on a mother board in the same manner as a system on-chip multi-chip module. With an intended logic function being set on the programmable device, a hardware-based function to be realized by the electronic circuit device can be simulated. With an operation program being written to the nonvolatile memory, a software-based function to be realized can be simulated.Type: GrantFiled: June 28, 2006Date of Patent: May 13, 2008Assignee: Renesas Technology CorporationInventors: Ryo Fujita, Osamu Kubo, Kouki Noguchi, Masaharu Kubo, Michihiro Mishima, Yasuhiko Takahashi
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Patent number: 7323771Abstract: An electronic circuit device has a high-density mount board (2), on which are disposed a microcomputer (3) and random access memory (7) which are connected to each other through an exclusive memory bus (12) for high-speed data transfer, a programmable device (8) which is a variable logic circuit represented by FPGA, and an electrically-rewritable nonvolatile memory (16) which can store the operation program of the microcomputer. The high-density mount board has external mounting pins on the bottom surface so that it can be mounted on a mother board in the same manner as a system on-chip multi-chip module. With an intended logic function being set on the programmable device, a hardware-based function to be realized by the electronic circuit device can be simulated. With an operation program being written to the nonvolatile memory, a software-based function to be realized can be simulated.Type: GrantFiled: June 28, 2006Date of Patent: January 29, 2008Assignee: Renesas Technology CorporationInventors: Ryo Fujita, Osamu Kubo, Kouki Noguchi, Masaharu Kubo, Michihiro Mishima, Yasuhiko Takahashi
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Publication number: 20070005479Abstract: This enterprise portfolio simulation system includes the mechanisms of selecting companies having a large mutual influence from a company's own project portfolio, a business partner company, other competing companies, and still other companies giving an influence on the company's own project portfolio, the business partner company, and the other competing companies; configuring a company network with the own company, the business partner company, and the other competing companies; making each of the own company, the business partner company, and the other competing companies perform a reasonable intention decision while mutually giving an influence; and performing a numerical experiment of an economic activity.Type: ApplicationFiled: June 30, 2006Publication date: January 4, 2007Applicant: Hitachi, Ltd.Inventors: Yuichi Ikeda, Shigeru Kawamoto, Osamu Kubo, Chihiro Fukui
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Publication number: 20060244122Abstract: An electronic circuit device has a high-density mount board (2), on which are disposed a microcomputer (3) and random access memory (7) which are connected to each other through an exclusive memory bus (12) for high-speed data transfer, a programmable device (8) which is a variable logic circuit represented by FPGA, and an electrically-rewritable nonvolatile memory (16) which can store the operation program of the microcomputer. The high-density mount board has external mounting pins on the bottom surface so that it can be mounted on a mother board in the same manner as a system on-chip multi-chip module. With an intended logic function being set on the programmable device, a hardware-based function to be realized by the electronic circuit device can be simulated. With an operation program being written to the nonvolatile memory, a software-based function to be realized can be simulated.Type: ApplicationFiled: June 28, 2006Publication date: November 2, 2006Inventors: Ryo Fujita, Osamu Kubo, Kouki Noguchi, Masaharu Kubo, Michihiro Mishima, Yasuhiko Takahashi
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Publication number: 20060237835Abstract: An electronic circuit device has a high-density mount board (2), on which are disposed a microcomputer (3) and random access memory (7) which are connected to each other through an exclusive memory bus (12) for high-speed data transfer, a programmable device (8) which is a variable logic circuit represented by FPGA, and an electrically-rewritable nonvolatile memory (16) which can store the operation program of the microcomputer. The high-density mount board has external mounting pins on the bottom surface so that it can be mounted on a mother board in the same manner as a system on-chip multi-chip module. With an intended logic function being set on the programmable device, a hardware-based function to be realized by the electronic circuit device can be simulated. With an operation program being written to the nonvolatile memory, a software-based function to be realized can be simulated.Type: ApplicationFiled: June 28, 2006Publication date: October 26, 2006Inventors: Ryo Fujita, Osamu Kubo, Kouki Noguchi, Masaharu Kubo, Michihiro Mishima, Yasuhiko Takahashi
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Patent number: 7091598Abstract: An electronic circuit device has a high-density mount board, on which are disposed a microcomputer, a random access memory, a programmable device which is a variable logic circuit represented by FPGA, and an electrically-rewritable nonvolatile memory which can store the operation program of the microcomputer. The high-density mount board has external mounting pins on the bottom surface so as to be mounted on a mother board in the same manner as a system on-chip multi-chip module. With an intended logic function being set on the programmable device, a hardware-based function to be realized by the electronic circuit device is simulated. With an operation program being written to the nonvolatile memory, a software-based function to be realized is simulated. Consequently, the device facilitates the debugging at early stages of system development, configures a prototype system, and contributes to the time reduction throughout the system development, prototype fabrication and large-scale production.Type: GrantFiled: January 19, 2001Date of Patent: August 15, 2006Assignee: Renesas Technology CorporationInventors: Ryo Fujita, Osamu Kubo, Kouki Noguchi, Masaharu Kubo, Michihiro Mishima, Yasuhiko Takahashi
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Patent number: 6989600Abstract: CMOS logic LSI comprises, as a part thereof, n-channel MISFET's (Qn), p-channel MISFET's (Qp) and a first-layer wiring (11) to a third-layer (13) formed on a main surface of a silicon substrate (1), and as another part, a fourth-layer wiring (14) to a seventh-layer wiring (17) formed on a main surface of a glass substrate (30) different from the silicon substrate (1). The main surface of the silicon substrate (1) and the main surface of the glass substrate (30) are arranged in face-to-face relation with each other, and a plurality of microbumps (20A) formed at the uppermost portion of the silicon substrate (1) and a plurality of microbumps (20B) formed at the uppermost portion of the glass substrate (30) are electrically connected, thereby constituting the CMOS logic LSI as a whole.Type: GrantFiled: March 30, 2001Date of Patent: January 24, 2006Assignee: Renesas Technology CorporationInventors: Masaharu Kubo, Ichiro Anjo, Akira Nagai, Osamu Kubo, Hiromi Abe, Hitoshi Akamine
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Publication number: 20060010055Abstract: A method and an apparatus for easily and efficiently setting an evaluation index suitable for an evaluation purpose when a business or a business portfolio is evaluated. In the method and apparatus, investment distribution is easily and visually confirmed during computation of the evaluation index when an object to be computed is the business portfolio. A table for defining a computation expression model for the evaluation index and a correspondence relationship between the evaluation index and the evaluation purpose is managed by a database to extract and provide an evaluation index model conforming to the evaluation purpose specified by a user. When the business portfolio is evaluated, business investment distributions are represented by a pie chart. The investment distribution information is updated and the evaluation index is computed, by adjusting a distribution surface of the represented pie chart.Type: ApplicationFiled: October 29, 2004Publication date: January 12, 2006Inventors: Mayumi Morita, Tomohiro Umezawa, Osamu Kubo
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Publication number: 20040061147Abstract: An electronic circuit device has a high-density mount board (2), on which are disposed a microcomputer (3) and random access memory (7) which are connected to each other through an exclusive memory bus (12) for high-speed data transfer, a programmable device (8) which is a variable logic circuit represented by FPGA, and an electrically-rewritable nonvolatile memory (16) which can store the operation program of the microcomputer. The high-density mount board has external mounting pins on the bottom surface so that it can be mounted on a mother board in the same manner as a system on-chip multi-chip module. With an intended logic function being set on the programmable device, a hardware-based function to be realized by the electronic circuit device can be simulated. With an operation program being written to the nonvolatile memory, a software-based function to be realized can be simulated.Type: ApplicationFiled: July 15, 2003Publication date: April 1, 2004Inventors: Ryo Fujita, Osamu Kubo, Kouki Noguchi, Masaharu Kubo, Michihiro Mishima, Yasuhiko Takahashi