Patents by Inventor Osamu Shiroma

Osamu Shiroma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240156381
    Abstract: Provided is an information processing apparatus including an estimation part configured to estimate a load experienced by a user, on the basis of data from a sensor measuring a physiological index of the user, the estimation part estimating, as the load, at least one of a workload experienced by the user carrying out a predetermined task and a visual load experienced by the user making alert concentration.
    Type: Application
    Filed: January 25, 2022
    Publication date: May 16, 2024
    Inventors: OSAMU SHIGETA, SHIN SHIROMA, ITARU SHIMIZU, TETSUO SAKAMOTO, TOMOMITSU HERAI
  • Patent number: 5629550
    Abstract: A photodiode built-in semiconductor device is provided that can prevent internal peripheral circuits from erroneously operating due to incident light entering slantingly, or not perpendicular to a top surface of the semiconductor chip. A semiconductor chip 20 includes a photodiode and its peripheral circuits. The region except for the photodiode is covered with a light shielding film 22 of aluminum metallization. An isolation region (P.sup.+) 23 is arranged at an outermost portion of the chip. A dummy island 24 is formed so as to surround the entire portion of the chip 20. An N.sup.+ -type low resistance region 25 is formed in the surface of the dummy island 24. The dummy photodiode is formed by applying a reverse bias potential across the PN junction defined between the isolation region 23 and the dummy island 24.
    Type: Grant
    Filed: August 29, 1995
    Date of Patent: May 13, 1997
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Keiji Mita, Osamu Shiroma