Abstract: A digital envelop tracker for a power amplifier. The digital envelop tracker includes a supply filter for filtering a supply voltage to a power amplifier, a level selection circuitry configured to determine a level of supply voltage based on an instantaneous power of an input data stream, schedule a series of switching events based on the determined level of supply voltage, and generate a level select signal based on the scheduled series of switching events, and a switch for connecting one of supply voltages to the supply filter based on the level select signal. The level selection circuitry schedules a primary switching event of the switch based on the determined level of supply voltage and secondary switching events of the switch delayed with respect to the primary switching event based on the determined level of supply voltage to generate a filter response of the supply filter with smaller peaking.

Abstract: A digital envelop tracker for a power amplifier. The digital envelop tracker includes a supply filter for filtering a supply voltage to a power amplifier, a level selection circuitry configured to determine a level of supply voltage based on an instantaneous power of an input data stream, schedule a series of switching events based on the determined level of supply voltage, and generate a level select signal based on the scheduled series of switching events, and a switch for connecting one of supply voltages to the supply filter based on the level select signal. The level selection circuitry schedules a primary switching event of the switch based on the determined level of supply voltage and secondary switching events of the switch delayed with respect to the primary switching event based on the determined level of supply voltage to generate a filter response of the supply filter with smaller peaking.

Abstract: A device for digital envelope tracking with dynamically changing voltage levels for a radio frequency (RF) power amplifier is disclosed. A power management unit generates a set of supply voltages for a power amplifier based on a control signal. A setpoint generator in the power management integrated circuit gradually increases or decreases a target voltage such that the set of supply voltages output from the voltage converter gradually increase or decrease in response to a gradual transition of the target voltage. A transceiver includes digital models for replicating a behavior of the setpoint generator and a voltage regulator in the voltage converter such that a signal pre-distortion unit may use an instantaneous voltage level for signal predistortion.

Abstract: A device for digital envelope tracking with dynamically changing voltage levels for a radio frequency (RF) power amplifier is disclosed. A power management unit generates a set of supply voltages for a power amplifier based on a control signal. A setpoint generator in the power management integrated circuit gradually increases or decreases a target voltage such that the set of supply voltages output from the voltage converter gradually increase or decrease in response to a gradual transition of the target voltage. A transceiver includes digital models for replicating a behavior of the setpoint generator and a voltage regulator in the voltage converter such that a signal pre-distortion unit may use an instantaneous voltage level for signal predistortion.

Abstract: An apparatus comprising a clamp. The clamp can include a plate. The plate can include a mounting opening to accommodate a shaft of a bolt module there-through and to stop an end of the bolt module from passing through, and cable tie openings. The clamp can also include a tube projecting from the plate, where an opening in the tube is coaxial with the mounting opening. The clamp can also include a non-metal curled coupling member sized to wrap around a portion of a cable and a non-metal coupling spacer member having a base portion and spacing arms projecting from the base portion. Ends of the spacing arms can be configured to contact the curled coupling member and the base portion has an opening coaxial with the mounting opening and the opening in the tube. A clamp and cable assembly and methods of manufacturing the clamp and assembling the clamp and the cable are also disclosed.

Abstract: A method for charging a battery is provided, wherein current pulses are supplied to the battery, wherein each pulse is followed by a rest period during which no current is supplied to the battery, and wherein the state of charge of the battery is determined during the rest period.

Abstract: A hybrid cable for telecommunications systems is disclosed. The hybrid cable may include a plurality of fiber-optic cables and power cables extending within an armor member and an outer jacket in a main body portion of the hybrid cable, and extending outside of the armor member and the outer jacket in a termination portion of the hybrid cable. Shielded tube assemblies may be attached to the power cables in the termination portion to provide electrical shielding to the power cables in the termination portion of the hybrid cable. The shielded tube assemblies may be attached to the armor member to electrically ground the shielded tube assemblies. A method of constructing a hybrid cable is also disclosed.

Abstract: A method for charging a battery is provided, wherein current pulses are supplied to the battery, wherein each pulse is followed by a rest period during which no current is supplied to the battery, and wherein the state of charge of the battery is determined during the rest period.

Abstract: A hybrid cable for telecommunications systems is disclosed. The hybrid cable may include a plurality of fiber-optic cables and power cables extending within an armor member and an outer jacket in a main body portion of the hybrid cable, and extending outside of the armor member and the outer jacket in a termination portion of the hybrid cable. Shielded tube assemblies may be attached to the power cables in the termination portion to provide electrical shielding to the power cables in the termination portion of the hybrid cable. The shielded tube assemblies may be attached to the armor member to electrically ground the shielded tube assemblies. A method of constructing a hybrid cable is also disclosed.

Abstract: Method and system of adjusting a first phase shift between a first data signal and a clock signal at a sending device. First and second test signals representing first and second test data, respectively, are transmitted to a receiving device. The test signals have respective phase shifts relative to the clock signal. An error detection code is calculated from first and second received data carried by the transmitted signals. The error detection code is transmitted from the receiving device to the sending device. An estimated first received data is calculated from the error detection code, wherein the estimated first received data are calculated under the assumption that the second received data are identical to the second test data. The first phase shift is adjusted on the basis of a comparison of the estimated first received data and the first test data.

Abstract: The invention relates to an assembly (AS) comprising at least one optical fibre (FB1, . . . , FB6) and a mounting device (EF), the at least one fibre protrudes from the mounting device (EF), and the mounting device (EF) is adapted to terminate a tube (TUB) for inserting the at least one optical fibre (FB1, . . . , FB6). The invention further relates to a method for mounting the assembly (AS).

Abstract: A tool for stripping off a jacket from tubes or cables is characterized by a bend adapted to an outer diameter of the duct or cable to be stripped, and a blade protruding from the bend to the interior of the bend. The invention provides a cost-effective, accurate and easily producible tool for stripping off a jacket from tubes or cables.

Abstract: Method and system of adjusting a first phase shift between a first data signal and a clock signal at a sending device. First and second test signals representing first and second test data, respectively, are transmitted to a receiving device. The test signals have respective phase shifts relative to the clock signal. An error detection code is calculated from first and second received data carried by the transmitted signals. The error detection code is transmitted from the receiving device to the sending device. An estimated first received data is calculated from the error detection code, wherein the estimated first received data are calculated under the assumption that the second received data are identical to the second test data. The first phase shift is adjusted on the basis of a comparison of the estimated first received data and the first test data.

Abstract: In an embodiment, the present invention relates to an integrated circuit comprising at least one data signal input (data1, data2), at least one clock signal input (Clock), at least one control signal input (Cnt_del1, Cnt_del2) and a data signal output (Data_out). According to the invention, the integrated circuit is configured to provide a digital data signal having a variable symbol duration at its output (Data_out), the symbol duration being controllable by means of the control signal (Cnt_del1, Cnt_del2). A further embodiment of the invention relates to a method for generating a digital data signal having a variable symbol duration in which an output signal is generated by at least one first data signal, at least one first clock signal and at least one control signal. For this purpose, at least one second clock signal is generated from the first clock signal, the second clock signal having a variable delay and the delay being set depending on the value of the at least one control signal.

Abstract: Method and system of adjusting a first phase shift between a first data signal and a clock signal at a sending device. First and second test signals representing first and second test data, respectively, are transmitted to a receiving device. The test signals have respective phase shifts relative to the clock signal. An error detection code is calculated from first and second received data carried by the transmitted signals. The error detection code is transmitted from the receiving device to the sending device. An estimated first received data is calculated from the error detection code, wherein the estimated first received data are calculated under the assumption that the second received data are identical to the second test data. The first phase shift is adjusted on the basis of a comparison of the estimated first received data and the first test data.

Abstract: Methods and apparatus for adjusting a phase difference between clock signals. A first clock signal at a memory controller is adjusted relative to a clock second signal at a memory device. In one embodiment, data is transferred to the memory device according to the first clock signal, which has a predetermined phase relationship with second clock signal. Data received at the memory device is sampled at the memory device according to the second clock signal. Analysis is done of the data on the memory controller and of the received data on the memory circuit. On the basis of the analysis, an adjustment may be made to the phase relationship.

Abstract: A test switching circuit for a high speed data interface is disclosed. Test switching circuit for a high speed data interface of an integrated circuit including switching transistors which switch in a test mode a termination resistor output stage of a data transmission signal path to a termination resistor input stage of a data reception signal path to form an internal feedback test loop within said integrated circuit.

Abstract: In an embodiment, the present invention relates to an integrated circuit comprising at least one data signal input (data1, data2), at least one clock signal input (Clock), at least one control signal input (Cnt_del1, Cnt_del2) and a data signal output (Data_out). According to the invention, the integrated circuit is configured to provide a digital data signal having a variable symbol duration at its output (Data_out), the symbol duration being controllable by means of the control signal (Cnt_del1, Cnt_del2). A further embodiment of the invention relates to a method for generating a digital data signal having a variable symbol duration in which an output signal is generated by at least one first data signal, at least one first clock signal and at least one control signal. For this purpose, at least one second clock signal is generated from the first clock signal, the second clock signal having a variable delay and the delay being set depending on the value of the at least one control signal.

Abstract: A method of contacting an electrical conductor (1) having a conducting core (2) covered partly by an insulating material (3), comprising installing a contacting device (10) in electrical contact with the conducting core in a position (4) where the conducting core is free from the insulating material. Said method further comprises a flexible element (5) comprising an electrically conducting material over the conducting core in said position prior to installing the contacting device, the flexible element comprising at least one adhesive portion (8) which adheres to the insulating material in a vicinity of said position and a non-adhesive portion (7) which contacts the conducting core.

Abstract: A device for processing binary data comprises at least one transmission link having an input for receiving a serial bit stream and an output for forwarding bits in a parallel format, and a serial/parallel converter providing n?2 successive data bits of the serial bit stream as n-bit data words in the parallel format.