Abstract: A novel technique for power management in computing systems and applications that significantly reduces power consumption. In one example embodiment, this is accomplished by forming a graph data structure including statistical information associated with wait state and execution paths on initiating the execution of an application program. An operating clock frequency is then computed to reach a current destination wait state as a function of the associated wait state and execution path information obtained from the formed graph data structure. The computing system is then operated at the computed operating clock frequency to reach the current destination wait state to reduce power consumption.