Patents by Inventor Pak Wong
Pak Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200027828Abstract: An integrated circuit device includes a memory circuit and a via layer that are used to support different memory demands based on a via configuration of the via layer. A first via configuration of the via layer causes the memory circuit of the integrated circuit device to function as a true dual-port memory circuit in a first via configuration. Moreover, a second via configuration of the via layer causes the memory circuit of the integrated circuit device to function as a simple dual-port memory circuit in a second via configuration.Type: ApplicationFiled: September 27, 2019Publication date: January 23, 2020Inventors: Wayson Lowe, Ban Pak Wong
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Patent number: 9820389Abstract: In one embodiment, a ball grid array (BGA) of a packaged semiconductor device and a corresponding landing pad array of a printed circuit board each have a layout defined by an interconnection array having (i) an inner sub-array of locations having connectors arranged in rows and columns separated by a specified pitch and (ii) an outer rectangular ring of locations having connectors arranged in rows and columns separated by the specified pitch. The outer rectangular ring is separated from the inner sub-array by a depopulated rectangular ring having a width of at least twice the specified pitch, wherein the depopulated rectangular ring has no connectors. The outer rectangular ring has empty locations having no connectors. Some of those empty locations define depopulated sets that divide the outer rectangular ring into a number of different contiguous sets of locations having connectors that enable pin escape for connectors of the device's BGA.Type: GrantFiled: April 28, 2016Date of Patent: November 14, 2017Assignee: Lattice Semiconductor CorporationInventor: Ban Pak Wong
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Publication number: 20160242298Abstract: In one embodiment, a ball grid array (BGA) of a packaged semiconductor device and a corresponding landing pad array of a printed circuit board each have a layout defined by an interconnection array having (i) an inner sub-array of locations having connectors arranged in rows and columns separated by a specified pitch and (ii) an outer rectangular ring of locations having connectors arranged in rows and columns separated by the specified pitch. The outer rectangular ring is separated from the inner sub-array by a depopulated rectangular ring having a width of at least twice the specified pitch, wherein the depopulated rectangular ring has no connectors. The outer rectangular ring has empty locations having no connectors. Some of those empty locations define depopulated sets that divide the outer rectangular ring into a number of different contiguous sets of locations having connectors that enable pin escape for connectors of the device's BGA.Type: ApplicationFiled: April 28, 2016Publication date: August 18, 2016Inventor: Ban Pak Wong
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Patent number: 9345137Abstract: In one embodiment, a ball grid array (BGA) of a packaged semiconductor device and a corresponding landing pad array of a printed circuit board each have a layout defined by an interconnection array having (i) an inner sub-array of locations having connectors arranged in rows and columns separated by a specified pitch and (ii) an outer rectangular ring of locations having connectors arranged in rows and columns separated by the specified pitch. The outer rectangular ring is separated from the inner sub-array by a depopulated rectangular ring having a width of at least twice the specified pitch, wherein the depopulated rectangular ring has no connectors. The outer rectangular ring has empty locations having no connectors. Some of those empty locations define depopulated sets that divide the outer rectangular ring into a number of different contiguous sets of locations having connectors that enable pin escape for connectors of the device's BGA.Type: GrantFiled: November 4, 2013Date of Patent: May 17, 2016Assignee: LATTICE SEMICONDUCTOR CORPORATIONInventor: Ban Pak Wong
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Publication number: 20160134264Abstract: In an integrated circuit, meta-stability prevention circuitry prevents an oscillator, such as a current-controlled oscillator having a ring of differential inverters, from being turned on, for example, during power up, until after the power-supply voltage is sufficiently high for the oscillator ring to achieve oscillation without going into a meta-stable state. In one implementation, a level detector monitors the power-supply voltage level and generates a logic signal indicating whether or not the power-supply voltage level is sufficiently high. That logic signal and a conventional chip-level power-down control signal are applied to logic circuitry that generates control signals for one or more switch transistors that selectively turn on and off the oscillator ring.Type: ApplicationFiled: November 7, 2014Publication date: May 12, 2016Inventors: Maryam Shahbazi, Hamid Ghezel, Ban Pak Wong, Magathi Jayaram
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Publication number: 20150124419Abstract: In one embodiment, a ball grid array (BGA) of a packaged semiconductor device and a corresponding landing pad array of a printed circuit board each have a layout defined by an interconnection array having (i) an inner sub-array of locations having connectors arranged in rows and columns separated by a specified pitch and (ii) an outer rectangular ring of locations having connectors arranged in rows and columns separated by the specified pitch. The outer rectangular ring is separated from the inner sub-array by a depopulated rectangular ring having a width of at least twice the specified pitch, wherein the depopulated rectangular ring has no connectors. The outer rectangular ring has empty locations having no connectors. Some of those empty locations define depopulated sets that divide the outer rectangular ring into a number of different contiguous sets of locations having connectors that enable pin escape for connectors of the device's BGA.Type: ApplicationFiled: November 4, 2013Publication date: May 7, 2015Applicant: Lattice Semiconductor CorporationInventor: Ban Pak Wong
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Patent number: 8016232Abstract: Methods and apparatus are provided controlling aircraft cabin pressure, and more specifically engine bleed air manifold pressure, during aircraft descent. An aircraft engine bleed air manifold control pressure setpoint is to either a descent pressure setpoint or a cruise pressure setpoint by determining a rotational speed of an aircraft engine component, determining a component speed setpoint value, and determining aircraft vertical speed. The engine bleed air manifold control pressure setpoint is set to the descent pressure setpoint if either the determined rotational speed of the aircraft engine component is below the component speed setpoint value or the aircraft vertical speed is less than a predetermined vertical speed value.Type: GrantFiled: May 29, 2008Date of Patent: September 13, 2011Assignee: Honeywell International Inc.Inventors: Peter Mark Anderson, Karen Hosler, Greg Chapman, Wai Pak Wong
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Publication number: 20090298407Abstract: Methods and apparatus are provided controlling aircraft cabin pressure, and more specifically engine bleed air manifold pressure, during aircraft descent. An aircraft engine bleed air manifold control pressure setpoint is to either a descent pressure setpoint or a cruise pressure setpoint by determining a rotational speed of an aircraft engine component, determining a component speed setpoint value, and determining aircraft vertical speed. The engine bleed air manifold control pressure setpoint is set to the descent pressure setpoint if either the determined rotational speed of the aircraft engine component is below the component speed setpoint value or the aircraft vertical speed is less than a predetermined vertical speed value.Type: ApplicationFiled: May 29, 2008Publication date: December 3, 2009Applicant: Honeywell International Inc.Inventors: Peter Mark Anderson, Karen Hosler, Greg Chapman, Wai Pak Wong
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Publication number: 20060235825Abstract: Methods for visualizing a graph by automatically drawing elements of the graph as labels are disclosed. In one embodiment, the method comprises receiving node information and edge information from an input device and/or communication interface, constructing a graph layout based at least in part on that information, wherein the edges are automatically drawn as labels, and displaying the graph on a display device according to the graph layout. In some embodiments, the nodes are automatically drawn as labels instead of, or in addition to, the label-edges.Type: ApplicationFiled: March 15, 2006Publication date: October 19, 2006Applicant: Battelle Memorial InstituteInventors: Pak Wong, Patrick Mackey, Kenneth Perrine, Harlan Foote, James Thomas
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Publication number: 20060198057Abstract: A slider mounted CPP GMR or TMR read head sensor is protected from electrostatic discharge (ESD) damage and from noise and cross-talk from an adjacent write head by means of a balanced resistive/capacitative shunt. The shunt includes highly resistive interconnections between upper and lower shields of the read head and a grounded slider substrate and a low resistance interconnection between the lower pole piece of the write head and the substrate. The capacitances between the pole piece and the upper shield, the upper shield and the lower shield and the lower shield and the substrate are made equal by either forming the shields and pole piece with equal surface areas and separating them with dielectrics of equal thicknesses, or by keeping the ratio of area to insulator thicknesses equal.Type: ApplicationFiled: March 7, 2005Publication date: September 7, 2006Inventors: Eric Leung, Anthony Lai, Pak Wong, David Hu, Moris Dovek, Rod Lee
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Patent number: 7000164Abstract: A system and method is provided for scan control and observation of a logical circuit that does not halt the operation of the system clock. Thus, all dynamic circuits within the system continue to evaluate and precharge normally. Moreover, the traditional method of placing a multiplexer before the data input of a clocked storage element to perform scan control and observation is no longer required. Consequently, the system and method provide a more efficient manner in which to perform scan control and observation of a logical circuit.Type: GrantFiled: January 30, 2002Date of Patent: February 14, 2006Assignee: Sun Microsystems, Inc.Inventors: Joseph R. Siegel, David J. Greenhill, Ban-Pak Wong
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Publication number: 20060024811Abstract: Current technologies allow the generation of artificial DNA molecules and/or the ability to alter the DNA sequences of existing DNA molecules. With a careful coding scheme and arrangement, it is possible to encode important information as an artificial DNA strand and store it in a living host safely and permanently. This inventive technology can be used to identify origins and protect R&D investments. It can also be used in environmental research to track generations of organisms and observe the ecological impact of pollutants. Today, there are microorganisms that can survive under extreme conditions. As well, it is advantageous to consider multicellular organisms as hosts for stored information. These living organisms can provide as memory housing and protection for stored data or information. The present invention provides well for data storage in a living organism wherein at least one DNA sequence is encoded to represent data and incorporated into a living organism.Type: ApplicationFiled: September 21, 2005Publication date: February 2, 2006Inventors: Pak Wong, Kwong Wong, Harlan Foote
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Publication number: 20060023333Abstract: A method for testing a TMR element includes a step of measuring a plurality of resistances of the TMR element by feeding a plurality of sense currents with different current values each other through the TMR element, a step of calculating a ratio of change in resistance from the measured plurality of resistances of the TMR element, and a step of evaluating the TMR element using the calculated ratio of change in resistance.Type: ApplicationFiled: May 17, 2005Publication date: February 2, 2006Applicants: TDK Corporation, SAE Magnetics (H.K.) Ltd.Inventors: Nozomu Hachisuka, Kenji Inage, Norio Takahashi, Tatsushi Shimizu, Pak Wong
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Publication number: 20060024733Abstract: Current technologies allow the generation of artificial DNA molecules and/or the ability to alter the DNA sequences of existing DNA molecules. With a careful coding scheme and arrangement, it is possible to encode important information as an artificial DNA strand and store it in a living host safely and permanently. This inventive technology can be used to identify origins and protect R&D investments. It can also be used in environmental research to track generations of organisms and observe the ecological impact of pollutants. Today, there are microorganisms that can survive under extreme conditions. As well, it is advantageous to consider multicellular organisms as hosts for stored information. These living organisms can provide as memory housing and protection for stored data or information. The present invention provides well for data storage in a living organism wherein at least one DNA sequence is encoded to represent data and incorporated into a living organism.Type: ApplicationFiled: September 21, 2005Publication date: February 2, 2006Inventors: Pak Wong, Kwong Wong, Harlan Foote
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Publication number: 20050078413Abstract: An HGA includes a magnetic head slider provided with at least one thin-film magnetic head element, and a conductive suspension to which the magnetic head slider is fixed. A conductive resistance between the magnetic head slider and the suspension is equal to or higher than 1 M?.Type: ApplicationFiled: September 2, 2004Publication date: April 14, 2005Applicants: SAE Magnetics (H.K) Ltd., TDK CORPORATIONInventors: Tatsushi Shimizu, Pak Wong, Hiroki Matsukuma, Masaru Hirose
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Publication number: 20030145264Abstract: A system and method is provided for scan control and observation of a logical circuit that does not halt the operation of the system clock. Thus, all dynamic circuits within the system continue to evaluate and precharge normally. Moreover, the traditional method of placing a multiplexer before the data input of a clocked storage element to perform scan control and observation is no longer required. Consequently, the system and method provide a more efficient manner in which to perform scan control and observation of a logical circuit.Type: ApplicationFiled: January 30, 2002Publication date: July 31, 2003Applicant: Sun Microsystems, Inc.Inventors: Joseph R. Siegel, David J. Greenhill, Ban-Pak Wong
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Patent number: 6457318Abstract: An integrated environmental control system for providing conditioned air supply in an aircraft is provided. The system includes an integrated bootstrap air cycle subsystem and a regenerative air cycle subsystem, which are in heat exchange relationship. The bootstrap and the regenerative air cycle systems are also in heat exchange relationship with a liquid cooling cycle subsystem. In the bootstrap cycle, bleed air is compressed and expanded. After absorbing heat from the liquid cycle, the expanded air from the bootstrap cycle is received and expanded by a first turbine of the regenerative air cycle. Before it is received by a compressor of the regenerative cycle, the air flow, which is expanded and cooled by the first turbine, absorbs heat from the liquid cycle, supplies air to the cabin and absorbs heat from the bootstrap cycle. After the compression, the air flow is received by a second turbine of the regenerative cycle and expanded.Type: GrantFiled: November 7, 2000Date of Patent: October 1, 2002Assignee: Honeywell International Inc.Inventors: Clarence Lui, Wai-Pak Wong, Myron Quan
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Patent number: 6250097Abstract: A liquid-to-air cycle system for conditioning water vapor bearing air and cooling a liquid load comprises an air cycle subsystem and a liquid cycle subsystem. The air cycle subsystem includes a first air-to-air heat exchanger, a reheater downstream of the first air-to-air heat exchanger, a first turbine downstream of the reheater, a first water extractor downstream of the first turbine, a first liquid-to-air heat exchanger downstream of the water extractor, and a second turbine downstream of the first liquid-to-air heat exchanger. Thereby, the second turbine can recover rejected heat from the first liquid-to-air heat exchanger. The liquid cycle subsystem is in heat exchange relationship the air cycle subsystem at the first liquid-to-air heat exchanger such that the first liquid-to-air heat exchanger absorbs the rejected heat from the liquid cycle subsystem.Type: GrantFiled: October 12, 1999Date of Patent: June 26, 2001Assignee: AlliedSignal Inc.Inventors: Clarence Lui, Wai-Pak Wong, Richard Meyer
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Patent number: 5625346Abstract: A smoke detector unit with a fan that creates an airstream which flows through a smoke detector. Both the fan and the smoke detector are located within a housing that is mounted to the fuselage of an airplane. The smoke detector generates an output signal that is provided to an indicator when a threshold level of smoke is detected. The output signal is typically latched by a relay that is also located within the housing.Type: GrantFiled: May 16, 1996Date of Patent: April 29, 1997Assignee: McDonnell Douglas CorporationInventors: Hyo Shim, Sham S. Hariram, Wai-Pak Wong, Ronald Blumke, Stanley C. Yu