Abstract: The invention relates to a phase-interpolation circuit and a phase-interpolation signal generating circuit applying the phase-interpolation circuit. The phase-interpolation circuit can avoid short-circuit current effectively. In addition, an inter-phase signal can be interpolated between the rising edge and the falling edge of the clock pulse. The phase-interpolation signal generating device can generate multiphase clock signals which not only have linearly distributed phases but also maintain good 50% duty cycle of the multiphase clock signals.

Abstract: A low to high voltage conversion output driver. The low to high voltage conversion output driver has an output coupled to a first fixed voltage via a load device and comprises a current source, a low voltage transistor, and a high voltage transistor. The current source has one end coupled to a second fixed voltage. The low voltage transistor has a first terminal coupled to the other end of the current source, a second terminal receiving a low voltage data signal, and a third terminal. The high voltage transistor has a first terminal coupled to the third terminal of the low voltage transistor, a second terminal coupled to a bias source, and a third terminal coupled to the output.

Abstract: A switching regulator includes a reference voltage generator and a switching-regulating module. The reference voltage generator receives a digital control signal and generates a reference voltage according to the digital control signal. The switching-regulating module is connected to the reference voltage generator and generates an output voltage according to the reference voltage. The value of the digital control signal is gradually increased to make the reference voltage being gradually increased at the initial stage of the activation of the switching regulator.

Abstract: A low to high voltage conversion output driver. The low to high voltage conversion output driver has an output coupled to a first fixed voltage via a load device and comprises a current source, a low voltage transistor, and a high voltage transistor. The current source has one end coupled to a second fixed voltage. The low voltage transistor has a first terminal coupled to the other end of the current source, a second terminal receiving a low voltage data signal, and a third terminal. The high voltage transistor has a first terminal coupled to the third terminal of the low voltage transistor, a second terminal coupled to a bias source, and a third terminal coupled to the output.

Abstract: A signal transmitting apparatus being used in a network device includes a voltage-controlled current source for outputting a current signal according to an input digital signal; a line driver for outputting a voltage signal according to the current signal; at least one impedance-matching unit, which is coupled to the line driver, for impedance-matching at the output of the line driver; and a first correction unit, which is coupled to the voltage-controlled current source, for outputting a first correction signal to adjust the current signal outputted from the voltage-controlled current source.

Abstract: A switching regulator includes a reference voltage generator and a switching-regulating module. The reference voltage generator receives a digital control signal and generates a reference voltage according to the digital control signal. The switching-regulating module is connected to the reference voltage generator and generates an output voltage according to the reference voltage. The value of the digital control signal is gradually increased to make the reference voltage being gradually increased at the initial stage of the activation of the switching regulator.

Abstract: A multiple-phase switching circuit includes an alternative signal generator for generating a plurality of alternative signals according to a switching signal, and a multiplexer for receiving a plurality of clock signals and outputting a target clock signal according to the alternative signals. Only one of the alternative signals generated by the alternative signal generator is in a first logic level, while the other alternative signals are in a second logic level. The alternative signal generator changes the logic level of a first alternative signal having the first logic level into the second logic level, and changes the logic level of a second alternative signal adjacent to the first alternative signal into the first logic level.

Abstract: The invention relates to a phase-interpolation circuit and a phase-interpolation signal generating circuit applying the phase-interpolation circuit. The phase-interpolation circuit can avoid short-circuit current effectively. In addition, an inter-phase signal can be interpolated between the rising edge and the falling edge of the clock pulse. The phase-interpolation signal generating device can generate multiphase clock signals which not only have linearly distributed phases but also maintain good 50% duty cycle of the multiphase clock signals.

Abstract: A transceiver in a full duplex communication system includes a hybrid circuit for transmitting a transmission signal or receiving a receive signal via the channel, the hybrid circuit includes an echo cancellation device for removing transmission signal components from the receive signal; wherein the hybrid circuit outputs a processed receive signal; and a gain amplifier being an OP-RC AGC is directly connected to the hybrid circuit for amplifying the processed receive signal, wherein a first node of the gain amplifier coupled to the echo cancellation device is a virtual ground.

Abstract: A high-to-low level shifter, coupled to a first external signal, for transforming the first external signal into an internal signal, wherein the first external signal substantially switches between a high-voltage-domain high potential and a high-voltage-domain low potential, the internal signal substantially switches between a low-voltage-domain high potential and a low-voltage-domain low potential. The high-to-low level shifter includes: an inverter, for generating a second external signal according to the first external signal, wherein the second external signal is inverse to the first external signal; and a level shifter, for generating the internal signal according to the first external signal and the second external signal.

Abstract: A signal transmitting apparatus being used in a network device includes a voltage-controlled current source for outputting a current signal according to an input digital signal; a line driver for outputting a voltage signal according to the current signal; at least one impedance-matching unit, which is coupled to the line driver, for impedance-matching at the output of the line driver; and a first correction unit, which is coupled to the voltage-controlled current source, for outputting a first correction signal to adjust the current signal outputted from the voltage-controlled current source.

Abstract: A high-to-low level shifter, coupled to a first external signal, for transforming the first external signal into an internal signal, wherein the first external signal substantially switches between a high-voltage-domain high potential and a high-voltage-domain low potential, the internal signal substantially switches between a low-voltage-domain high potential and a low-voltage-domain low potential. The high-to-low level shifter includes: an inverter, for generating a second external signal according to the first external signal, wherein the second external signal is inverse to the first external signal; and a level shifter, for generating the internal signal according to the first external signal and the second external signal.

Abstract: A multiple-phase switching circuit includes an alternative signal generator for generating a plurality of alternative signals according to a switching signal, and a multiplexer for receiving a plurality of clock signals and outputting a target clock signal according to the alternative signals. Only one of the alternative signals generated by the alternative signal generator is in a first logic level, while the other alternative signals are in a second logic level. The alternative signal generator changes the logic level of a first alternative signal having the first logic level into the second logic level, and changes the logic level of a second alternative signal adjacent to the first alternative signal into the first logic level.

Abstract: A high-to-low level shifter, coupled to a first external signal, for transforming the first external signal into an internal signal, wherein the first external signal substantially switches between a high-voltage-domain high potential and a high-voltage-domain low potential, the internal signal substantially switches between a low-voltage-domain high potential and a low-voltage-domain low potential. The high-to-low level shifter includes: an inverter, for generating a second external signal according to the first external signal, wherein the second external signal is inverse to the first external signal; and a level shifter, for generating the internal signal according to the first external signal and the second external signal.

Abstract: The present invention is to provide a multiple phases switching circuit which is operable with a multiple phase signal generator and a succeeding circuit. The multiple-phase signal generator generates N multiple-phase clock signals. Phases of the multiple-phase clock signals are different. The multiple phases switching circuit comprises an alternative signal generator and a multiplexer. The alternative signal generator outputs an alternative signal according to an up/down switching signal. The multiplexer is coupled to the alternative signal generator for receiving the multiple-phase clock signals and proceeding a glitch/spike preventing process according to the alternative signal so as to output a target clock signal to the succeeding circuit.

Abstract: The invention relates to a phase-interpolation circuit and a phase-interpolation signal generating circuit applying the phase-interpolation circuit. The phase-interpolation circuit can avoid short-circuit current effectively. In addition, an inter-phase signal can be interpolated between the rising edge and the falling edge of the clock pulse. The phase-interpolation signal generating device can generate multiphase clock signals which not only have linearly distributed phases but also maintain good 50% duty cycle of the multiphase clock signals.

Abstract: The present invention generally relates to a generator and a method for generating a recovered clock with high phase resolution. The recovered clock generator comprises a multi-phase clock generator to generate a plurality of multi-phase clock signals with a predetermined frequency higher than a target frequency; a phase selector for receiving the multi-phase clock signals and outputting a selected-phase clock signal according to a selecting signal; and a frequency divider for dividing the frequency of the selected-phase clock signal so as to generate a recovered clock with the target frequency. The recovered clock generator further comprises a phase interpolation unit between the multi-phase clock generator and phase selector. Therefore, the recovered clock generator of the invention can be implemented with less circuit space, and the wires of the layout will not interference the accuracy and the monotonic of the selected clock.

Abstract: The present invention is to provide an average bubble correction circuit which will expand the range of bubble error correction and will detect the proper position of the 1/0 state-conversion points of the thermometer codes to low down the error rate that caused by the ROM decoding. The average bubble correction circuit is used in the analog to digital converter and will convert the thermometer code obtained from the comparator of the analog to digital converter into the 1/0 state-conversion point.

Abstract: The present invention is to provide a multiple phases switching circuit, which can be used in a multiple phase signal generator and a succeeding circuit, in the same time, the multiple phase signal generator will generate N multiple phases clock signals that spreading 360 degrees, the phase of any clock signal is ahead of the phase of the next coming clock signal, the multiple phase switching circuit comprises:

Abstract: The present invention is to provide an average bubble correction circuit which will expand the range of bubble error correction and will detect the proper position of the 1/0 state-conversion points of the thermometer codes to low down the error rate that caused by the ROM decoding. The average bubble correction circuit is used in the analog to digital converter and will convert the thermometer code obtained from the comparator of the analog to digital converter into the 1/0 state-conversion point.