Abstract: An amplifier (50) for voice or audio signals, and particularly for headset applications, uses a low gm amplifier (54) for initially charging an output node (OUT) at the beginning of a power-on phase. After charging the output node, a main amplifier (56) is enabled to amplify the voice or audio signal. At power-down, a sample-and-hold circuit (58) drives an output transistor to discharge an AC coupling capacitor (20). Thus, spikes at the output node are eliminated and an external filtering capacitor is not needed.

Abstract: An amplifier (50) for voice or audio signals, and particularly for headset applications, uses a low gm amplifier (54) for initially charging an output node (OUT) at the beginning of a power-on phase. After charging the output node, a main amplifier (56) is enabled to amplify the voice or audio signal. At power-down, a sample-and-hold circuit (58) drives an output transistor to discharge an AC coupling capacitor (20). Thus, spikes at the output node are eliminated and an external filtering capacitor is not needed.

Abstract: At least some embodiments include a LED driver system. The system includes multiple branches of series-coupled LEDs, multiple current sources, and control logic. Each of the current sources is coupled to a separate branch of series-coupled LEDs. The control logic is coupled to the current sources, and is configured to regulate current through each branch based at least in part on a feedback voltage measured at a node in one of the branches.

Abstract: At least some embodiments include a LED driver system. The system includes multiple branches of series-coupled LEDs, multiple current sources, and control logic. Each of the current sources is coupled to a separate branch of series-coupled LEDs. The control logic is coupled to the current sources, and is configured to regulate current through each branch based at least in part on a feedback voltage measured at a node in one of the branches.

Abstract: In at least some embodiments, a communication device includes a processor and a communication interface coupled to the processor. The communication interface has a programmable current-based hook detection circuit for detecting when a telephonic communication starts and ends.

Abstract: At least some embodiments include a LED driver system. The system includes multiple branches of series-coupled LEDs, multiple current sources, and control logic. Each of the current sources is coupled to a separate branch of series-coupled LEDs. The control logic is coupled to the current sources, and is configured to regulate current through each branch based at least in part on a feedback voltage measured at a node in one of the branches.

Abstract: The present disclosure describes systems and methods for driving light emitting diodes (LEDs). At least some embodiments include an LED driver system that includes a power supply, a plurality of current sources (each current source coupled between a common return resistor and one of a plurality of branches of series coupled LEDs, and each branch coupled between a corresponding current source and the power supply), and control logic coupled to the current sources (the control logic capable of controlling the current flow through each current source). Each of the current sources allows current to flow during one of a plurality of substantially non-overlapping time periods within a repeating time interval, each current source allowing current to flow during a different time period. The magnitude of the current flowing through each current source is substantially the same and is regulated based upon a feedback voltage across the common return resistor.

Abstract: An amplifier (50) for voice or audio signals, and particularly for headset applications, uses a low gm amplifier (54) for initially charging an output node (OUT) at the beginning of a power-on phase. After charging the output node, a main amplifier (56) is enabled to amplify the voice or audio signal. At power-down, a sample-and-hold circuit (58) drives an output transistor to discharge an AC coupling capacitor (20). Thus, spikes at the output node are eliminated and an external filtering capacitor is not needed.

Abstract: An amplifier (50) for voice or audio signals, and particularly for headset applications, uses a low gm amplifier (54) for initially charging an output node (OUT) at the beginning of a power-on phase. After charging the output node, a main amplifier (56) is enabled to amplify the voice or audio signal. At power-down, a sample-and-hold circuit (58) drives an output transistor to discharge an AC coupling capacitor (20). Thus, spikes at the output node are eliminated and an external filtering capacitor is not needed.

Abstract: A calibrated RC filter (4) includes a fully differential calibration circuit (10) and finite state machine (8) for determining processing variations in the resistive and capacitive components of a RC filter (6). The finite state machine controls tunable capacitors (7) in the RC filter (6) according to the results of the calibration. In order to provide a symmetrical coverage range, an asymmetrical correction code is used for the nominal case.

Abstract: The amplifier circuit includes at least one amplification branch having an input transistor, an output transistor, having a source terminal connected to the input terminal and a drain terminal connected to a first output terminal, and a gain raising stage, having an input and an output connected to the source terminal and, respectively, to a gate terminal of the output transistor. The amplifier circuit includes, moreover, a compensation capacitor connected between the gate terminal and the drain terminal of the output transistor.

Abstract: A pipeline analog-to-digital converter (40) includes a plurality of sequentially connected converter stages (42), with each stage having a sample-and-hold circuit (22) for sampling and holding an analog voltage input, an analog-to-digital converter (24) for converting the analog voltage input into an intermediate digital representation, a digital-to-analog converter (26) for converting the digital representation into an intermediate voltage signal and an operational amplifier (46) for amplifying a voltage difference between the output of the sample-and-hold circuit and the intermediate voltage output. A variable bias current is applied to the operational amplifier (46) to conserve power, such that a low current is supplied during sampling and a high current is supplied during amplification.

Abstract: A method of improving the signal/noise ratio of a sigma-delta modulator during the re-establishment of its stability that includes: defining a bit sequence corresponding to a state of instability of the modulator, monitoring the flow of bits output by the modulator to check whether it contains the instability bit sequence, and resetting the modulator to zero if the instability bit sequence is detected at the output. To ensure a high signal/noise ratio of the modulator even during the detection and re-establishment of stability, the method also includes: delaying the flow of bits output by the modulator at least for the time required to detect the instability bit sequence and modifying the output bit sequence during the delay period by replacing it with a predetermined bit sequence.

Abstract: The amplifier circuit includes at least one amplification branch having an input transistor, an output transistor, having a source terminal connected to the input terminal and a drain terminal connected to a first output terminal, and a gain raising stage, having an input and an output connected to the source terminal and, respectively, to a gate terminal of the output transistor. The amplifier circuit includes, moreover, a compensation capacitor connected between the gate terminal and the drain terminal of the output transistor.

Abstract: The present invention refers to a fully differential operational amplifier of the folded cascode type. In one embodiment the fully differential operational amplifier comprises: a differential input stage able to drive a differential output stage; said differential output stage includes a first branch having at least a first and a second transistor, and a second branch having at least a third and a fourth transistor; said first and second branch are coupled to a first and a second voltage source; a feedback circuit of said first, second, third and fourth transistors that is constituted by a single amplifier having four inputs and four outputs, said four inputs taking the voltages present on a terminal of said first, second, third and fourth transistors, and providing voltages to the control elements of said first, second, third and fourth transistors, which voltages depend on the input voltages of said four inputs.

Abstract: A method of re-establishing the stability of a sigma-delta modulator having a plurality of integrator stages in cascade and a quantizer, achieving very short resetting times, a bit sequence corresponding to an instability state of the modulator is defined, the bit-stream output by the modulator is monitored to check whether it includes the instability sequence and, if the instability sequence is detected, the last integrator stage is reset and one or more preceding integrator stages are reset, progressively, until the instability sequence is no longer detected.

Abstract: A class AB single-stage operational amplifier having input decoupler stages for voltage signals, a voltage repeater stage, biasing transistors and bias current generators for the input decoupler stages, and capacitors placed between the input decoupler stages and the voltage repeater stage so as to increase the phase margin.

Abstract: A digital-analog converter having a sigma delta cascade modulator with two outputs, particularly a third order sigma delta modulator 2+1. The digital-analog converter includes a sigma delta modulator of the type having two outputs able to supply a first and a second signal to the two outputs; a reconstruction circuit of the first and second signals able to provide a reconstructed signal; a filter able to filter the reconstructed signal; the reconstruction circuit combining the first and second signals according to the following relationship: Yout Y1*(1+Z−1)−Y2*(1−Z−1)+Y2*Z−2*(1−Z−1), where: Yout corresponds to said reconstructed signal, Y1 corresponds to said first signal, Y2 corresponds to said according to signal, Z corresponds to the Z transform.

Abstract: Fully-differential, switched-capacitor circuit having a first and second input terminal, and including: an operational amplifier having a first and a second differential input, a first and a second output terminal and a bias control terminal; a feedback network, connected between the differential outputs and the input terminals, and having intermediate nodes connected to the differential inputs of the operational amplifier; and a control circuit, including a detection network and an error amplifier. The error amplifier has a first input receiving a desired common-mode voltage, and an output connected to the bias control terminal and supplying a control voltage. The detection network has a first and a second input connected directly, respectively, to the second input terminal of the operational amplifier, and an output connected to a second input of the error amplifier, and supplying a common-mode drive voltage.

Abstract: A method of improving the signal/noise ratio of a sigma-delta modulator during the re-establishment of its stability that includes: defining a bit sequence corresponding to a state of instability of the modulator, monitoring the flow of bits output by the modulator to check whether it contains the instability bit sequence, and resetting the modulator to zero if the instability bit sequence is detected at the output. To ensure a high signal/noise ratio of the modulator even during the detection and re-establishment of stability, the method also includes: delaying the flow of bits output by the modulator at least for the time required to detect the instability bit sequence and modifying the output bit sequence during the delay period by replacing it with a predetermined bit sequence.