Abstract: A self-adjusting phase lock circuit including a frequency and/or phase comparator which compares the frequency and/or phase of a reference signal FVCO with the frequency and/or phase of a frequency or phase modulated signal RD generates an error signal which is applied as an input to an integrating network. The network generates an error voltage VC related to the frequency/phase error of the two signals which is applied to the control input of a voltage controlled oscillator operative to generate the reference signal FVCO as a function of the error voltage and of an adjusting voltage received at an adjusting input of the oscillator. Self-adjusting means is provided which includes a fixed reference voltage periodically applied as an input to the control input of the oscillator as a substitute for the error voltage and a source of a fixed frequency signal periodically applied as an input to the comparator as a substitute for the modulated signal RD.

Abstract: A phase lock circuit for compensation for bit frequency variations of information read from a movable magnetic media including a phase comparator, a number of low pass filters, a decoupling element and variable frequency oscillator which is temperature compensated.