Patents by Inventor Parag Choudhary

Parag Choudhary has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System, method, and computer program product for electronic design visualization
    Patent number: 9645715
    Abstract: The present disclosure relates to a computer-implemented method for electronic design simulation. The method may include receiving, using at least one processor, an electronic design and displaying, at a graphical user interface, at least a portion of the electronic design. Embodiments may also include allowing a user to select at least one design variable at the graphical user interface. Embodiments may also include simulating the electronic design, based upon, at least in part, the selected at least one design variable and in response to the simulation, automatically displaying an updated value at the graphical user interface.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: May 9, 2017
    Assignee: Cadence Design Systems, Inc.
    Inventors: Abha Jain, Hitesh Mohan Kumar, Parag Choudhary, Viren Agarwal
  • Method and system for schematic-visualization driven topologically-equivalent layout design in RFSiP
    Patent number: 8601422
    Abstract: An improved approach for automatically generating physical layout constraints and topology that are visually in-sync with the logic schematic created for simulation is described. The present approach is also directed to an automatic method for transferring topology from logic design to layout.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: December 3, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Alok Tripathi, Abha Jain, Parag Choudhary, Utpal Bhattacharya
  • Context-aware non-linear graphic editing
    Patent number: 8427502
    Abstract: A graphical editor displays graphical representations of underlying data items in a distribution of information-bearing states across a bounded region of a display. One or more of the data items are selected as belonging to a context of a user task or operation. The information-bearing states are redistributed in the bounded region of the display so that an amount of information sufficient to the task is provided through the graphical representations of the data items in the context and any space in the bounded region of the display needed to display such information is acquired by a decrease in the amount of information provided by the data items outside the context.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: April 23, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Parag Choudhary, Hitesh Mohan Kumar, Abha Jain
  • Virtual view schematic editor
    Patent number: 7990375
    Abstract: Embodiments of the present invention provide a virtual-view schematic editor for use in CAD systems. In response to a user request, the editor selects elements from a CAD database, determines the connectivity between the elements, and renders the elements on a single display. Virtual views may be created and stored for later re-use within the system.
    Type: Grant
    Filed: April 3, 2006
    Date of Patent: August 2, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Vikas Kohli, Parag Choudhary
  • METHOD AND SYSTEM FOR SCHEMATIC-VISUALIZATION DRIVEN TOPOLOGICALLY-EQUIVALENT LAYOUT DESIGN IN RFSiP
    Publication number: 20100115487
    Abstract: An improved approach for automatically generating physical layout constraints and topology that are visually in-sync with the logic schematic created for simulation is described. The present approach is also directed to an automatic method for transferring topology from logic design to layout.
    Type: Application
    Filed: December 22, 2008
    Publication date: May 6, 2010
    Applicant: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Alok TRIPATHI, Abha JAIN, Parag CHOUDHARY, Utpal BHATTACHARYA
  • Context-Aware Non-Linear Graphic Editing
    Publication number: 20100037136
    Abstract: A graphical editor displays graphical representations of underlying data items in a distribution of information-bearing states across a bounded region of a display. One or more of the data items are selected as belonging to a context of a user task or operation. The information-bearing states are redistributed in the bounded region of the display so that an amount of information sufficient to the task is provided through the graphical representations of the data items in the context and any space in the bounded region of the display needed to display such information is acquired by a decrease in the amount of information provided by the data items outside the context.
    Type: Application
    Filed: August 8, 2008
    Publication date: February 11, 2010
    Applicant: CADENCE DESIGN SYSTEMS, INC
    Inventors: Parag Choudhary, Hitesh Mohan Kumar, Abha Jain
  • Virtual view schematic editor
    Publication number: 20070229537
    Abstract: Embodiments of the present invention provide a virtual-view schematic editor for use in CAD systems. In response to a user request, the editor selects elements from a CAD database, determines the connectivity between the elements, and renders the elements on a single display. Virtual views may be created and stored for later re-use within the system.
    Type: Application
    Filed: April 3, 2006
    Publication date: October 4, 2007
    Applicant: Cadence Design Systems, Inc.
    Inventors: Vikas Kohli, Parag Choudhary