Patents by Inventor Partha Pratim Kundu

Partha Pratim Kundu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171507
    Abstract: A network interface controller (NIC) capable of efficiently utilizing an output buffer is provided. The NIC can be equipped with an output buffer, a host interface, an injector logic block, and an allocation logic block. The output buffer can include a plurality of cells, each of which can be a unit of storage in the output buffer. If the host interface receives a command from a host device, the injector logic block can generate a packet based on the command. The allocation logic block can then determine whether the packet is a multi-cell packet. If the packet is a multi-cell packet, the allocation logic block can determine a virtual index for the packet. The allocation logic block can then store, in an entry in a data structure, the virtual index, and a set of physical indices of cells storing the packet.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Inventors: Partha Pratim Kundu, David Charles Hewson
  • Publication number: 20240121181
    Abstract: A network interface controller (NIC) capable of performing message passing interface (MPI) list matching is provided. The NIC can include a host interface, a network interface, and a hardware list-processing engine (LPE). The host interface can couple the NIC to a host device. The network interface can couple the NIC to a network. During operation, the LPE can receive a match request and perform MPI list matching based on the received match request.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Partha Pratim Kundu, Andrew S. Kopser, Duncan Roweth, Robert Alverson
  • Publication number: 20240106736
    Abstract: One embodiment provides a network interface controller (NIC). The NIC can include a storage device, a network interface, a hardware list-processing engine (LPE), and a message state table (MST) logic block. The storage device can store an MST. The network interface can couple the NIC to a network. The LPE can perform message matching on a first packet of a message received via the network interface. The MST logic block can store results of the message matching in the MST and receive a request to read the results of the message matching from the MST if the NIC receives a second packet associated with the message.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Inventors: Partha Pratim Kundu, Robert Alverson, Duncan Roweth
  • Patent number: 11916781
    Abstract: A network interface controller (NIC) capable of efficiently utilizing an output buffer is provided. The NIC can be equipped with an output buffer, a host interface, an injector logic block, and an allocation logic block. The output buffer can include a plurality of cells, each of which can be a unit of storage in the output buffer. If the host interface receives a command from a host device, the injector logic block can generate a packet based on the command. The allocation logic block can then determine whether the packet is a multi-cell packet. If the packet is a multi-cell packet, the allocation logic block can determine a virtual index for the packet. The allocation logic block can then store, in an entry in a data structure, the virtual index, and a set of physical indices of cells storing the packet.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: February 27, 2024
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Partha Pratim Kundu, David Charles Hewson
  • Patent number: 11882025
    Abstract: A network interface controller (NIC) capable of performing message passing interface (MPI) list matching is provided. The NIC can include a host interface, a network interface, and a hardware list-processing engine (LPE). The host interface can couple the NIC to a host device. The network interface can couple the NIC to a network. During operation, the LPE can receive a match request and perform MPI list matching based on the received match request.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: January 23, 2024
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Partha Pratim Kundu, Andrew S. Kopser, Duncan Roweth, Robert Alverson
  • Patent number: 11855881
    Abstract: One embodiment provides a network interface controller (NIC). The NIC can include a storage device, a network interface, a hardware list-processing engine (LPE), and a message state table (MST) logic block. The storage device can store an MST. The network interface can couple the NIC to a network. The LPE can perform message matching on a first packet of a message received via the network interface. The MST logic block can store results of the message matching in the MST and receive a request to read the results of the message matching from the MST if the NIC receives a second packet associated with the message.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: December 26, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Partha Pratim Kundu, Robert Alverson, Duncan Roweth
  • Patent number: 11799764
    Abstract: A network interface controller (NIC) capable of efficient packet injection into an output buffer is provided. The NIC can be equipped with an output buffer, a plurality of injectors, a prioritization logic block, and a selection logic block. The plurality of injectors can share the output buffer. The prioritization logic block can determine a priority associated with a respective injector based on a high watermark and a low watermark associated with the injector. The selection logic block can then determine, from the plurality of injectors, a subset of injectors associated with a buffer class and determine whether the subset of injectors includes a high-priority injector. Upon identifying a high-priority injector in the subset of injectors, the selection logic block can select the high-priority injector for injecting a packet in the output buffer.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: October 24, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Abdulla M. Bataineh, Thomas L. Court, Vincent Chang, David Charles Hewson, Eric P. Lundberg, Partha Pratim Kundu
  • Publication number: 20220311544
    Abstract: A network interface controller (NIC) capable of efficient packet forwarding is provided. The NIC can be equipped with a host interface, a packet generation logic block, and a forwarding logic block. During operation, the packet generation logic block can obtain, via the host interface, a message from the host device and for a remote device. The packet generation logic block may generate a plurality of packets for the remote device from the message. The forwarding logic block can then send a first subset of packets of the plurality of packets based on ordered delivery. If a first condition is met, the forwarding logic block can send a second subset of packets of the plurality of packets based on unordered delivery. Furthermore, if a second condition is met, the forwarding logic block can send a third subset of packets of the plurality of packets based on ordered delivery.
    Type: Application
    Filed: March 23, 2020
    Publication date: September 29, 2022
    Inventors: Robert Alverson, Partha Pratim Kundu, Duncan Roweth, David Charles Hewson, Albert SauPong Cheng
  • Publication number: 20220255884
    Abstract: A network interface controller (NIC) capable of efficiently utilizing an output buffer is provided. The NIC can be equipped with an output buffer, a host interface, an injector logic block, and an allocation logic block. The output buffer can include a plurality of cells, each of which can be a unit of storage in the output buffer. If the host interface receives a command from a host device, the injector logic block can generate a packet based on the command. The allocation logic block can then determine whether the packet is a multi-cell packet. If the packet is a multi-cell packet, the allocation logic block can determine a virtual index for the packet. The allocation logic block can then store, in an entry in a data structure, the virtual index, and a set of physical indices of cells storing the packet.
    Type: Application
    Filed: March 23, 2020
    Publication date: August 11, 2022
    Inventors: Partha Pratim Kundu, David Charles Hewson
  • Publication number: 20220229800
    Abstract: A network interface controller (NIC) capable of performing message passing interface (MPI) list matching is provided. The NIC can include a host interface, a network interface, and a hardware list-processing engine (LPE). The host interface can couple the NIC to a host device. The network interface can couple the NIC to a network. During operation, the LPE can receive a match request and perform MPI list matching based on the received match request.
    Type: Application
    Filed: March 23, 2020
    Publication date: July 21, 2022
    Inventors: Partha Pratim Kundu, Andrew S. Kopser, Duncan Roweth, Robert Alverson
  • Publication number: 20220231965
    Abstract: One embodiment provides a network interface controller (NIC). The NIC can include a storage device, a network interface, a hardware list-processing engine (LPE), and a message state table (MST) logic block. The storage device can store an MST. The network interface can couple the NIC to a network. The LPE can perform message matching on a first packet of a message received via the network interface. The MST logic block can store results of the message matching in the MST and receive a request to read the results of the message matching from the MST if the NIC receives a second packet associated with the message.
    Type: Application
    Filed: March 23, 2020
    Publication date: July 21, 2022
    Inventors: Partha Pratim Kundu, Robert Alverson, Duncan Roweth
  • Publication number: 20220200912
    Abstract: A network interface controller (NIC) capable of efficient packet injection into an output buffer is provided. The NIC can be equipped with an output buffer, a plurality of injectors, a prioritization logic block, and a selection logic block. The plurality of injectors can share the output buffer. The prioritization logic block can determine a priority associated with a respective injector based on a high watermark and a low watermark associated with the injector. The selection logic block can then determine, from the plurality of injectors, a subset of injectors associated with a buffer class and determine whether the subset of injectors includes a high-priority injector. Upon identifying a high-priority injector in the subset of injectors, the selection logic block can select the high-priority injector for injecting a packet in the output buffer.
    Type: Application
    Filed: March 23, 2020
    Publication date: June 23, 2022
    Inventors: Abdulla M. Bataineh, Thomas L. Court, Vincent Chang, David Charles Hewson, Eric P. Lundberg, Partha Pratim Kundu