Abstract: A system for isolating a first power domain from a second power domain in an integrated circuit includes receiving an input signal from the first power domain and receiving a set of bits from a programmable register. An isolation enable signal indicative of isolating the first power domain from the second power domain is generated, and an intermediate signal based on the isolation enable signal and the input signal is generated. At least one of the input signal, a logic low signal, a logic high signal, and the intermediate signal is output based on the isolation enable signal and the set of bits.

Abstract: A current-starved inverter circuit includes first and second current-mirror circuits, first and second transistors, a detector, and a current-booster. The first and second transistors receive a first source current and a first sink current from the first and second current-mirror circuits, respectively, and an input voltage signal, and generate an inverted input voltage signal (an output voltage signal). The detector generates a first detection signal when the output voltage signal exceeds a first threshold value and a second detection signal when the output voltage signal is less than a second threshold value. The current-booster, which is connected to the detector, receives the first and second detection signals and provides a second source current and a second sink current to the first and second transistors to pull-up and pull-down a voltage level of the output voltage signal, respectively.

Abstract: A current-starved inverter circuit includes first and second current-mirror circuits, first and second transistors, a detector, and a current-booster. The first and second transistors receive a first source current and a first sink current from the first and second current-mirror circuits, respectively, and an input voltage signal, and generate an inverted input voltage signal (an output voltage signal). The detector generates a first detection signal when the output voltage signal exceeds a first threshold value and a second detection signal when the output voltage signal is less than a second threshold value. The current-booster, which is connected to the detector, receives the first and second detection signals and provides a second source current and a second sink current to the first and second transistors to pull-up and pull-down a voltage level of the output voltage signal, respectively.

Abstract: A power grid model system, method and computer program product which includes a switching state processor, a topological processor, an equipment update processor, and a historic power grid model for a power grid. The historic power grid model has an equipment layer and a topology layer. Responsive to a switch operated in a power grid, the switching state processor is notified of the operated switch, notifies the topological processor of the operated switch and notifies the power grid model for updating of the historic power grid model; and the topological processor determines the extent of the update of the power grid model, parses through details of the equipment layer and updates the topology layer in the power grid model.

Abstract: A power grid model system, method and computer program product which includes a switching state processor, a topological processor, an equipment update processor, and a historic power grid model for a power grid. The historic power grid model has an equipment layer and a topology layer. Responsive to a switch operated in a power grid, the switching state processor is notified of the operated switch, notifies the topological processor of the operated switch and notifies the power grid model for updating of the historic power grid model; and the topological processor determines the extent of the update of the power grid model, parses through details of the equipment layer and updates the topology layer in the power grid model.