Patents by Inventor Parviz Keshtbod

Parviz Keshtbod has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8477530
    Abstract: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: July 2, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Petro Estakhri, Mahmud Assar, Parviz Keshtbod
  • Patent number: 8456897
    Abstract: A multi-state current-switching magnetic memory element has a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: June 4, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Patent number: 8440471
    Abstract: A method of flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: May 14, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Mahmud Assar
  • Patent number: 8427863
    Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: April 23, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Roger Klaus Malmhall, Parviz Keshtbod
  • Publication number: 20130088914
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 18, 2012
    Publication date: April 11, 2013
    Applicant: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20130087869
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 18, 2012
    Publication date: April 11, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20130087870
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 21, 2012
    Publication date: April 11, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20130087872
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 21, 2012
    Publication date: April 11, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20130087871
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 21, 2012
    Publication date: April 11, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20130088915
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 18, 2012
    Publication date: April 11, 2013
    Applicant: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Patent number: 8405174
    Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer and a top electrode formed on top of the cap layer.
    Type: Grant
    Filed: April 23, 2012
    Date of Patent: March 26, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod
  • Patent number: 8399943
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: March 19, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Patent number: 8399942
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: March 19, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Patent number: 8391058
    Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: March 5, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Mahmud Assar
  • Patent number: 8391054
    Abstract: A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: March 5, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Mahmud Assar, Parviz Keshtbod
  • Patent number: 8389301
    Abstract: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: March 5, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Petro Estakhri, Mahmud Assar, Parviz Keshtbod
  • Publication number: 20130052752
    Abstract: Various embodiments of the invention relate to etching processes used in fabrication of MTJ cells in an MRAM device. The various embodiments can be used in combination with each other. The first embodiment adds a hard mask buffer layer between a hard mask and a top electrode. The second embodiment uses a multilayered etching hard mask. The third embodiment uses a multilayered top electrode structure including a first Cu layer under a second layer such as Ta. The fourth embodiment is a two-phase etching process used for the bottom electrode to remove re-deposited material while maintaining a more vertical sidewall etching profile. In the first phase the bottom electrode layer is removed using carbonaceous reactive ion etching until the endpoint. In the second phase an inert gas and/or oxygen plasma is used to remove the polymer that was deposited during the previous etching processes.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Inventors: Kimihiro Satoh, Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Parviz Keshtbod, Roger K. Malmhall
  • Patent number: 8385108
    Abstract: A method of method of writing to a magnetic memory cell includes selecting a magnetic memory cell of a magnetic memory array to be written to, the magnetic memory cell including a pair of MTJs, and setting a bit line (BL) coupled to the magnetic memory cell to a state that causes current to flow through the pair of MTJs in a manner that causes the direction of current flow through one of the MTJs of the pair of MTJs to be in a direction opposite to that of the other MTJ of the pair of MTJs.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: February 26, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Ebrahim Abedifard, Siamack Nemazie, Parviz Keshtbod
  • Patent number: 8363457
    Abstract: A sensing circuit includes a sense amplifier circuit having a first and second nodes through which a magnetic memory element is sensed. A first current source is coupled to the first node a second current source is coupled to the second node. A reference magnetic memory element has a resistance associated therewith and is coupled to the first node, the reference magnetic memory element receives current from the first current source. At least one memory element, having a resistance associated therewith, is coupled to the second node and receives current from the second current source. Current from the first current source and current from the second current source are substantially the same. The logic state of the at least one memory element is sensed by a comparison of the resistance of the at least one memory element to the resistance of the reference magnetic memory element.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: January 29, 2013
    Assignee: Avalanche Technology, Inc.
    Inventor: Parviz Keshtbod
  • Publication number: 20130017627
    Abstract: A magnetic random access memory (MRAM) cell includes an embedded MRAM and an access transistor. The embedded MRAM is formed on a number of metal-interposed-in-interlayer dielectric (ILD) layers, which each include metal dispersed therethrough and are formed on top of the access transistor. An magneto tunnel junction (MTJ) is formed on top of a metal formed in the ILD layers that is in close proximity to a bit line. An MTJ mask is used to pattern the MTJ and is etched to expose the MTJ. Ultimately, metal is formed on top of the bit line and extended to contact the MTJ.
    Type: Application
    Filed: September 19, 2012
    Publication date: January 17, 2013
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Parviz KESHTBOD, Ebrahim ABEDIFARD