Patents by Inventor Pascal Ancey

Pascal Ancey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7179392
    Abstract: A process for manufacturing a resonator including the steps of: forming on an insulating substrate a first portion of a conductive material and a second portion of another material on the first portion; forming an insulating layer having its upper surface flush with the upper part of the second portion; forming by a succession of depositions and etchings a beam of a conductive material above the second portion, the beam ends being on the insulating layer on either side of the second portion, the upper surface of the second portion being exposed on either side of the beam, a third portion of a piezoelectric material on the beam and a fourth portion of a conductive material on the third portion above the beam portion located above the second portion; and removing the second portion.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: February 20, 2007
    Assignees: STMicroelectronics S.A., Commissariat a l'Energie Atomique
    Inventors: Philippe Robert, Grégory Caruyer, Pascal Ancey, Guillaume Bouche
  • Publication number: 20060226736
    Abstract: A support 7 for an acoustic resonator 4 includes at least one bilayer assembly having a layer of high acoustic impedance material 11 and a layer of low acoustic impedance material 12 made of material having a low electrical permittivity.
    Type: Application
    Filed: November 27, 2003
    Publication date: October 12, 2006
    Inventors: Guillaume Bouche, Gregory Caruyer, Pascal Ancey
  • Patent number: 7038355
    Abstract: A device comprising a resonator formed of a piezoelectric layer sandwiched between two metal electrodes, the resonator being laid on a suspended beam, the device comprising means for deforming said beam by the difference in thermal expansion coefficients.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: May 2, 2006
    Assignee: STMicroelectronics SA
    Inventors: Guillaume Bouche, Pascal Ancey, Grégory Caruyer
  • Publication number: 20060082390
    Abstract: A thin soft magnetic film combines a high magnetization with an insulating character. The film is formed by nitriding Fe-rich ferromagnetic nanograins immersed in an amorphous substrate. A selective oxidation of the amorphous substrate is then performed. The result is a thin, insulating, soft magnetic film of high magnetization. Many types of integrated circuits can be made which include a component using a membrane incorporating the above-mentioned thin film.
    Type: Application
    Filed: July 25, 2005
    Publication date: April 20, 2006
    Applicants: STMicroelectronics S.A., Commissariat a L'Energie Atomique
    Inventors: Guillaume Bouche, Pascal Ancey, Bernard Viala, Sandrine Couderc
  • Publication number: 20060054984
    Abstract: A MOS transistor with a deformable gate formed in a semiconductor substrate, including source and drain areas separated by a channel area extending in a first direction from the source to the drain and in a second direction perpendicular to the first one, a conductive gate beam placed at least above the channel area extending in the second direction between bearing points placed on the substrate on each side of the channel area, and such that the surface of the channel area is hollow and has a shape similar to that of the gate beam when said beam is in maximum deflection towards the channel area.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 16, 2006
    Applicants: STMicroelectronics, Commissariat a I'Energie Atomique
    Inventors: Pascal Ancey, Nicolas Abele, Fabrice Casset
  • Publication number: 20050199970
    Abstract: An electromechanical resonator includes a monocrystalline-silicon substrate (S) provided with an active zone (ZA) delimited by an insulating region, a vibrating beam (10) anchored by at least one of its free ends on the insulating region and including a monocrystalline-silicon vibrating central part (12), and a control electrode (E) arranged above the beam and bearing on the active zone. The central part (12) of the beam is separated from the active zone (ZA) and from the control electrode (E).
    Type: Application
    Filed: July 21, 2004
    Publication date: September 15, 2005
    Applicant: STMICROELECTRONICS SA
    Inventors: Stephane Monfray, Pascal Ancey, Thomas Skotnicki, Karim Segueni
  • Publication number: 20050168104
    Abstract: Acoustic resonator device (1) includes an active element (6) and a support provided with a membrane (5). The active element (6) is provided with at least one piezoelectric layer (10) and is surmounted by a multilayer stack (12). The multilayer stack (12) is provided with at least three layers, including at least one layer (15) of high acoustic impedance and at least one layer (13) of low acoustic impedance. An integrated circuit including at least one such acoustic resonator device is also disclosed.
    Type: Application
    Filed: December 10, 2004
    Publication date: August 4, 2005
    Applicant: STMICROELECTRONICS SA
    Inventors: Guillaume Bouche, Gregory Caruyer, Pascal Ancey
  • Publication number: 20050028336
    Abstract: The resonator comprises a piezoelectric layer arranged between two electrodes. An electrical heating resistor is arranged in thermal contact with at least one of the electrodes. Temporary heating of the electrode enables the material constituting the electrode to be partially evaporated, so as to thin the electrode and thus adjust the resonance frequency. Measurement of the resonance frequency in the course of evaporation enables the heating to be interrupted when the required resonance frequency is obtained. One of the electrodes can be arranged on a substrate formed by an acoustic Bragg grating. The resonator can comprise a substrate comprising a cavity whereon one of the electrodes is at least partially arranged.
    Type: Application
    Filed: July 6, 2004
    Publication date: February 10, 2005
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE, ST MICROELECTRONICS SA
    Inventors: Philippe Robert, Pascal Ancey, Gregory Caruyer
  • Publication number: 20050024178
    Abstract: A switchable inductance that can be formed in an integrated circuit, including a spiral interrupted between two first points connected to two terminals via two metallizations running one above the other, one of the two metallizations being deformable; a hollowing between the two metallizations; and a switching device capable of deforming the deformable metallization to separate or to put in contact said two metallizations.
    Type: Application
    Filed: July 30, 2004
    Publication date: February 3, 2005
    Inventors: Pascal Ancey, Daniel Saias
  • Publication number: 20050023931
    Abstract: An acoustic resonator assembly includes a layer of high-acoustic-impedance material and a layer of low-acoustic-impedance material made of a low-electrical-permittivity material. This assembly may support the resonator over an interconnect layer or act as a decoupling assembly between two active elements of the resonator. The assembly may alternatively include three low-acoustic impedance layers. Alternatively, the assembly may include three acoustic impedance layers wherein two of the layers are low acoustic impedance layers and the third layer has a higher acoustic impedance than the first two or alternatively is a high-acoustic impedance layer.
    Type: Application
    Filed: June 15, 2004
    Publication date: February 3, 2005
    Applicant: STMicroelectronics S.A.
    Inventors: Guillaume Bouche, Gregory Caruyer, Pascal Ancey
  • Patent number: 6846690
    Abstract: The fabrication of an integrated circuit includes a first phase of producing an electronic chip and a second phase of producing at least one auxiliary component placed above the chip and of producing a protective cover which covers the auxiliary component. The first phase of producing the chip is effected from a first semiconductor substrate and comprises the formation of a cavity lying in a chosen region of the chip and emerging at the upper surface of the chip. The second production phase includes the production of the auxiliary component from a second semiconductor substrate, separate from the first, and then the placement in the cavity of the auxiliary component supported by the second substrate and the mutual adhesion of the second substrate to the upper surface of the chip lying outside the cavity. The second substrate then also forms the protective cover.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: January 25, 2005
    Assignee: STMicroelectronics S.A.
    Inventors: Alexis Farcy, Philippe Coronel, Pascal Ancey, Joaquin Torres
  • Publication number: 20050001698
    Abstract: An electronic component (1) includes a substrate (2) and at least two piezoelectric resonators (3, 4) each having an active element (6, 9), a lower electrode (5, 8) and an upper electrode (7, 10). The lower electrode (5) of the first resonator (3) is made of a material that is different from that of the lower electrode (8) of the second resonator (4) such that the resonators exhibit different resonance frequencies.
    Type: Application
    Filed: April 1, 2004
    Publication date: January 6, 2005
    Applicant: STMICROELECTRONICS SA
    Inventors: Guillaume Bouche, Nick Smears, Pascal Ancey, Gregory Caruyer
  • Publication number: 20040251781
    Abstract: A device comprising a resonator formed of a piezoelectric layer sandwiched between two metal electrodes, the resonator being laid on a suspended beam, the device comprising means for deforming said beam by the difference in thermal expansion coefficients.
    Type: Application
    Filed: March 31, 2004
    Publication date: December 16, 2004
    Applicant: STMicroelectronics S.A.
    Inventors: Guillaume Bouche, Pascal Ancey, Gregory Caruyer
  • Publication number: 20040174091
    Abstract: A process for manufacturing a resonator including the steps of: forming on an insulating substrate a first portion of a conductive material and a second portion of another material on the first portion; forming an insulating layer having its upper surface flush with the upper part of the second portion; forming by a succession of depositions and etchings a beam of a conductive material above the second portion, the beam ends being on the insulating layer on either side of the second portion, the upper surface of the second portion being exposed on either side of the beam, a third portion of a piezoelectric material on the beam and a fourth portion of a conductive material on the third portion above the beam portion located above the second portion; and removing the second portion.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 9, 2004
    Inventors: Philippe Robert, Gregory Caruyer, Pascal Ancey, Guillaume Bouche
  • Publication number: 20040149808
    Abstract: A method for attaching a first element to a second element is provided. The first element has a surface portion covered with a layer of silicon, and the second element has a surface portion covered with a layer of nickel. The method includes applying pressure so that the surface portions of the first and second elements are in contact with one another. A roughness between the surface portions is less than about 1 &mgr;m, and the first and second elements are heated within a range of about 250° C. to 400° C.
    Type: Application
    Filed: December 5, 2003
    Publication date: August 5, 2004
    Applicant: STMicroelectronics SA
    Inventors: Guillaume Bouche, Pascal Ancey, Benoit Froment
  • Publication number: 20030119219
    Abstract: The fabrication of an integrated circuit includes a first phase of producing an electronic chip and a second phase of producing at least one auxiliary component placed above the chip and of producing a protective cover which covers the auxiliary component. The first phase of producing the chip is effected from a first semiconductor substrate and comprises the formation of a cavity lying in a chosen region of the chip and emerging at the upper surface of the chip. The second production phase includes the production of the auxiliary component from a second semiconductor substrate, separate from the first, and then the placement in the cavity of the auxiliary component supported by the second substrate and the mutual adhesion of the second substrate to the upper surface of the chip lying outside the cavity. The second substrate then also forms the protective cover.
    Type: Application
    Filed: December 3, 2002
    Publication date: June 26, 2003
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Alexis Farcy, Philippe Coronel, Pascal Ancey, Joaquin Torres
  • Patent number: 5741067
    Abstract: A method of predicting the formation of water condensation on a surface in contact with humid air includes the steps of placing on the surface an element that adopts initially a temperature approximately equal to a temperature of the surface. The element is thermally cycled. Each cycle includes a cooling phase and a heating phase. The cooling phase includes first and second steps. Electric current is supplied to a cooling mechanism in the first step of the cooling phase to decrease the temperature of the element to below the temperature of the surface. An electric current is supplied to the cooling mechanism in the second step of the cooling phase to further decrease the temperature of the element. The current of the first step is greater than the current of the second step, such that the temperature of the element decreases more rapidly in the first step than in the second step. The formation of water condensation on the surface is predicted based upon the formation of water condensation on the element.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: April 21, 1998
    Assignee: Imra Europe SA
    Inventors: Michel Gschwind, Pascal Ancey
  • Patent number: 5568977
    Abstract: A process is disclosed to detect a water condensation risk on a surface in contact with a wet air volume, which uses the steps of (a) placing a sensitive element on the surface, which initially takes a temperature corresponding to that of the surface, (b) by means of a heating device on this sensitive element, initiating a first heating phase until a temperature higher than the surface temperature is reached, (c) by means of a cooling device having the same thermal power as the heating device, initiating a cooling phase until a temperature lower than the surface temperature is provoked on the sensitive element, and (d) a comparison is made between the ratio of the first heating phase time to the temperature rise during heating and the ratio of cooling phase time to the temperature decrease during the cooling, a noticeable difference between these two ratios indicating a significant risk of condensation on the surface.
    Type: Grant
    Filed: February 3, 1994
    Date of Patent: October 29, 1996
    Assignee: Imra Europe SA
    Inventors: Michel Gschwind, Pascal Ancey
  • Patent number: 5462608
    Abstract: A Peltier effect device which detects in particular a condensation risk, includes a substrate and semiconducting bands disposed on the upper face of the substrate. The junctions connecting said bands which make up a series circuit are formed by semiconducting bands of N-type and P-type. Junctions of the same type, i.e., N-P type are situated on the central zone of the upper face of the substrate and defines a detection zone of the device. Semiconducting bands of one type are placed on one side of the upper face of the substrate and bands of the other type are placed on the other side of the upper face of the substrate. The substrate also includes at the peripheral zone of each band, except for a frontmost N-type band and a rearmost P-type band, a plated hole extending through the substrate to a lower face of the substrate and to a plating of the lower face such that a plated hole situated at an end of the P-type band is connected to a plated hole situated at an end of a next N-type band.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: October 31, 1995
    Assignee: Imra Europe SA
    Inventors: Michel Gschwind, Pascal Ancey