Patents by Inventor Patrice I. Godefroid

Patrice I. Godefroid has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7002903
    Abstract: A method of verifying that a CDMA code allocator maintains mutual orthogonality between all concurrently busy codes includes the steps of identifying a code being allocated by the allocator, and determining if the identified code is busy. It is also determined if any ancestral parent of the identified code is busy, and if any descendant of the identified code is busy. If the identified code, one of the identified code's ancestral parents, or one of the identified code's descendants is determined to be busy, then an error in allocator operation is indicated.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: February 21, 2006
    Assignee: Lucent Technologies Inc.
    Inventors: Satish Chandra, Patrice I. Godefroid, Christopher D. Palm, Steven M. Welsh
  • Publication number: 20020176384
    Abstract: A method of verifying that a CDMA code allocator maintains mutual orthogonality between all concurrently busy codes includes the steps of identifying a code being allocated by the allocator, and determining if the identified code is busy. It is also determined if any ancestral parent of the identified code is busy, and if any descendant of the identified code is busy. If the identified code, one of the identified code's ancestral parents, or one of the identified code's descendants is determined to be busy, then an error in allocator operation is indicated.
    Type: Application
    Filed: May 23, 2001
    Publication date: November 28, 2002
    Inventors: Satish Chandra, Patrice I. Godefroid, Christopher D. Palm, Steven M. Welsh
  • Patent number: 5768498
    Abstract: A finite symbolic representation of the states of an unbounded FIFO queue. Because the representation is protocol verification tools of the type which explore the state space of a protocol may be used to verify protocols which involve unbounded FIFO queues and consequently have an infinite state space. In a preferred embodiment, the finite symbolic representation is used together with a finite state automaton whose states are the global states of the protocol. A symbolic representation of the queue states is associated with each of the global states. State space exploration continues until all new queue states reached are already contained in the states of the finite symbolic representation. Increased processing speed is achieved by employing meta-transitions in the finite state automaton and exploring the meta-transitions from a global state before exploring the ordinary transitions.
    Type: Grant
    Filed: January 23, 1996
    Date of Patent: June 16, 1998
    Assignee: Lucent Technologies
    Inventors: Bernard Armand G.G. Boigelot, Patrice I. Godefroid