Patents by Inventor Patrick A. L. De Martine

Patrick A. L. De Martine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5619675
    Abstract: The cache buffer management system functions in a mass storage subsystem to locate a less recently referenced cache buffer to be overwritten with new data. The system of the present invention utilizes P in-cache bitmaps (ICBMs) in a history table to indicate that a particular cache buffer, corresponding to each bit of each ICBM, has been referenced during the past P time periods. A cache buffer is "hot" if the corresponding bit in any of the P ICBMs indicates that the cache buffer has been referenced. Otherwise, where all corresponding bits in all P ICBMs are clear, a cache buffer is "cold". In conjunction with the ICBMs, a track reference count list (TRCL) circular list contains the ID of cache buffers in chronological order of their reference. To determine a buffer suitable for overwriting, the cache buffer management system searches backward from oldest toward newest in the TRCL list of references to find a cache buffer which is "cold". The first "cold" cache buffer found is then overwritten with new data.
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: April 8, 1997
    Assignee: Storage Technology Corporation
    Inventors: Patrick A. L. De Martine, Michael S. Milillo
  • Patent number: 5566315
    Abstract: The cache memory space in a computer system is controlled on a dynamic basis by adjusting the low threshold which triggers the release of more cache free space and by adjusting the high threshold which ceases the release of free space. The low and high thresholds are predicted based on the number of allocations which are accomplished in response to I/O requests, and based on the number of blockages which occur when an allocation can not be accomplished. The predictions may be based on weighted values of different historical time periods, and the high and low thresholds may be made equal to one another. In this manner the performance degradation resulting from variations in workload caused by prior art fixed or static high and low thresholds is avoided. Instead only a predicted amount of cache memory space is freed and that amount of free space is more likely to accommodate the predicted output requests without releasing so much cache space that an unacceptable number of blockages occur.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: October 15, 1996
    Assignee: Storage Technology Corporation
    Inventors: Michael S. Milillo, Patrick A. L. De Martine