Patents by Inventor Patrick Blessing

Patrick Blessing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160013191
    Abstract: A capacitor includes a substrate, a multilayer over the substrate, a plurality of container-shaped storage node structures on the semiconductor substrate and surrounded by the multilayer, the storage node structure has a sidewall extending upwardly from the base to the top, where the sidewall includes an upper segment and a lower segment thinner than the upper segment, a capacitor dielectric material along a surface of each storage node structure, and a capacitor electrode material over the capacitor dielectric material.
    Type: Application
    Filed: September 21, 2015
    Publication date: January 14, 2016
    Inventors: Sanjeev Sapra, Brett W. Busch, Jian Li, Chad Patrick Blessing, Greg Allen Funston
  • Patent number: 9230966
    Abstract: A capacitor includes a substrate, a multilayer over the substrate, a plurality of container-shaped storage node structures on the semiconductor substrate and surrounded by the multilayer, the storage node structure has a sidewall extending upwardly from the base to the top, where the sidewall includes an upper segment and a lower segment thinner than the upper segment, a capacitor dielectric material along a surface of each storage node structure, and a capacitor electrode material over the capacitor dielectric material.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: January 5, 2016
    Assignee: NANYA TECHNOLOGY CORP.
    Inventors: Sanjeev Sapra, Brett W. Busch, Jian Li, Chad Patrick Blessing, Greg Allen Funston
  • Publication number: 20150294971
    Abstract: A capacitor includes a substrate, a multilayer over the substrate, a plurality of container-shaped storage node structures on the semiconductor substrate and surrounded by the multilayer, the storage node structure has a sidewall extending upwardly from the base to the top, where the sidewall includes an upper segment and a lower segment thinner than the upper segment, a capacitor dielectric material along a surface of each storage node structure, and a capacitor electrode material over the capacitor dielectric material.
    Type: Application
    Filed: April 9, 2014
    Publication date: October 15, 2015
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Sanjeev Sapra, Brett W. Busch, Jian Li, Chad Patrick Blessing, Greg Allen Funston
  • Patent number: 8166637
    Abstract: An apparatus for mounting semiconductor chips as flip chips on a substrate includes a chip supply, a pick-and-place system with a bonding head having a chip gripper, a flipping apparatus operable to rotate the chip from a first position to a second (flipped) position through an angle with a gripper and two cameras. The first camera determines a position of the chip before the flipping apparatus receives the chip and also determines a position of the flipped chip received by the chip gripper of the bonding head once the flipping apparatus has transferred the chip to it. The apparatus also comprises an optical switch, e.g., a rotatable mirror located in the field of view of the first camera. The mirror operates to rotate with the gripper of the flipping apparatus but at half the angle.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: May 1, 2012
    Assignee: ESEC AG
    Inventors: Patrick Blessing, Ruedi Grueter, Dominik Werne
  • Patent number: 8133823
    Abstract: The invention relates to a method for picking up semiconductor chips from a wafer table and, optionally, their mounting on a substrate by means of a pick-and-place system. The position and orientation of the semiconductor chip to be mounted next are determined by means of a first camera and made available in the form of positional data relating to a first system of coordinates. The position and orientation of the substrate place on which the semiconductor chip will be mounted are determined by means of a second camera and made available in the form of positional data relating to a second system of coordinates. The conversion of coordinates of the first or second system of coordinates into coordinates of motion of the pick-and-place system occurs by means of two fixed mapping functions and two changeable correction vectors. The correction vectors are readjusted on the occurrence of a predetermined event.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: March 13, 2012
    Assignee: Oerlikon Assembly Equipment AG, Steinhausen
    Inventors: Stefan Behler, Patrick Blessing
  • Publication number: 20100315655
    Abstract: Determination of the height difference between a first reference point and a second reference point, at least one of the two reference points lying on a semiconductor chip, which is mounted on a substrate, comprises the steps A) recording a first image from a first direction, which runs diagonally to the surface of the substrate at a predetermined angle ?2, the substrate and the semiconductor chip being illuminated from a second direction which runs diagonally to the surface of the substrate at a predetermined angle ?3, a telecentric optics being located in the beam path, B) recording a second image from the second direction, the substrate and the semiconductor chip being illuminated from the first direction, either the cited telecentric optics or a further telecentric optics being located in the beam path, C) ascertaining a first coordinate of the position of the first reference point and a first coordinate of the position of the second reference point in the first image and determining a first difference
    Type: Application
    Filed: November 19, 2007
    Publication date: December 16, 2010
    Applicant: ESEC AG
    Inventors: Stefan Behler, Patrick Blessing, Stephan Scholze, Roland Stalder, Martin Von Arx
  • Publication number: 20100040449
    Abstract: The invention relates to an apparatus for mounting semiconductor chips as flip chip on a substrate. The apparatus comprises means for supplying the semiconductor chips, a pick-and-place system with a bonding head with a chip gripper, a flipping apparatus with a gripper and two cameras. The first camera is used for determining the actual position of the semiconductor chip that is provided by the said means for mounting before the flipping apparatus receives the semiconductor chip, and it is used to determine the actual position of the flip chip received by the chip gripper of the bonding head once the flipping apparatus has transferred the semiconductor chip. The apparatus comprises an optical switch in accordance with the invention, e.g., a rotatably held mirror which is located in the field of view of the first camera. In operation, the mirror is rotated simultaneously with the gripper of the flipping apparatus, but only by half the angle.
    Type: Application
    Filed: January 25, 2008
    Publication date: February 18, 2010
    Applicant: ESEC AG
    Inventors: Patrick Blessing, Ruedi Grueter, Dominik Werne
  • Patent number: 7597234
    Abstract: The invention concerns a method for mounting a semiconductor chip with bumps on one surface onto a substrate location of a substrate, whereby the bumps are brought into contact with corresponding pads on the substrate location. Reference marks are attached to the bondhead that enable measurement of the actual position of the semiconductor chip as well as measurement of the actual position of the substrate location in relation to a system of coordinates defined by the reference marks. Positional displacement of the individual components of the assembly machine caused by thermal influences can be compensated without perpetual calibration procedures having to be carried out.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: October 6, 2009
    Assignee: Oerlikon Assembly Equipment AG, Steinhausen
    Inventors: Patrick Blessing, Ruedi Grueter, Dominik Werne
  • Publication number: 20090098667
    Abstract: The invention relates to a method for picking up semiconductor chips from a wafer table and, optionally, their mounting on a substrate by means of a pick-and-place system. The position and orientation of the semiconductor chip to be mounted next are determined by means of a first camera and made available in the form of positional data relating to a first system of coordinates. The position and orientation of the substrate place on which the semiconductor chip will be mounted are determined by means of a second camera and made available in the form of positional data relating to a second system of coordinates. The conversion of coordinates of the first or second system of coordinates into coordinates of motion of the pick-and-place system occurs by means of two fixed mapping functions and two changeable correction vectors. The correction vectors are readjusted on the occurrence of a predetermined event.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 16, 2009
    Applicant: Oerlikon Assembly Equipment AG, Steinhausen
    Inventors: Stefan Behler, Patrick Blessing
  • Publication number: 20070145102
    Abstract: The invention concerns a method for mounting a semiconductor chip with bumps on one surface onto a substrate location of a substrate, whereby the bumps are brought into contact with corresponding pads on the substrate location. Reference marks are attached to the bondhead that enable measurement of the actual position of the semiconductor chip as well as measurement of the actual position of the substrate location in relation to a system of coordinates defined by the reference marks. Positional displacement of the individual components of the assembly machine caused by thermal influences can be compensated without perpetual calibration procedures having to be carried out.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 28, 2007
    Applicant: Unaxis International Trading Ltd.
    Inventors: Patrick Blessing, Ruedi Grueter, Dominik Werne
  • Patent number: 7193727
    Abstract: An apparatus for mounting semiconductor chips onto a substrate contains a measuring station for the contactless measurement of the height of the surface of the mounted semiconductor chip facing away from the substrate at a minimum of three locations. From this, at least one parameter is calculated that characterises the adhesive layer formed between the semiconductor chip and the substrate. A difference of the measured value to a set value is used to adjust the mounting process. An apparatus for wiring semiconductor chips also contains such a measuring station in order to determine the individual height of each connection point on the semiconductor chip. This information is used in order to lower the capillary to the respective connection point on the semiconductor chip in the shortest possible time.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: March 20, 2007
    Assignee: Unaxis International Trading Ltd
    Inventor: Patrick Blessing
  • Publication number: 20050056947
    Abstract: An apparatus for mounting semiconductor chips onto a substrate contains a measuring station for the contactless measurement of the height of the surface of the mounted semiconductor chip facing away from the substrate at a minimum of three locations. From this, at least one parameter is calculated that characterises the adhesive layer formed between the semiconductor chip and the substrate. A difference of the measured value to a set value is used to adjust the mounting process. An apparatus for wiring semiconductor chips also contains such a measuring station in order to determine the individual height of each connection point on the semiconductor chip. This information is used in order to lower the capillary to the respective connection point on the semiconductor chip in the shortest possible time.
    Type: Application
    Filed: September 10, 2004
    Publication date: March 17, 2005
    Inventor: Patrick Blessing