Abstract: A multi-stage process to remove contaminant gases from raw methane streams is provided. The present technology is an innovative solution to recover and purify biogas by use of a process having at least two pressure swing adsorption stages. Taking advantage of the presence of carbon dioxide in the raw biogas streams, nitrogen and oxygen are bulky removed in the first stage, using selective adsorbents, and a nitrogen and oxygen-depleted intermediate stream is yielded to the second stage. The second stage employs an adsorbent or adsorbents to selectively remove carbon dioxide and trace amounts of remaining nitrogen and oxygen, thus producing a purer methane stream that meets pipeline and natural gas specifications.

Abstract: A multi-stage process to remove contaminant gases from raw methane streams is provided. The present technology is an innovative solution to recover and purify biogas by use of a process having at least two pressure swing adsorption stages. Taking advantage of the presence of carbon dioxide in the raw biogas streams, nitrogen and oxygen are bulky removed in the first stage, using selective adsorbents, and a nitrogen and oxygen-depleted intermediate stream is yielded to the second stage.

Abstract: The invention relates to a heat exchanger, in particular for a motor vehicle, including a bundle (3) for a heat exchange between a first and second fluid A, L and a housing (5) inside of which said bundle (3) is housed, said exchanger further including at least one collector (7) attached to said housing (5), said collector (7) being configured to guide said first fluid A between said bundle (3) and an inlet or outlet of said exchanger. According to the invention, said collector (7) is configured to form an abutment (9) for positioning the heat exchanger bundle (3) in the housing (5) for attaching said collector (7) to said housing (5).

Abstract: The invention relates to a heat exchanger, in particular for a motor vehicle, including a bundle (3) for a heat exchange between a first and second fluid A, L and a housing (5) inside of which said bundle (3) is housed, said exchanger further including at least one collector (7) attached to said housing (5), said collector (7) being configured to guide said first fluid A between said bundle (3) and an inlet or outlet of said exchanger. According to the invention, said collector (7) is configured to form an abutment (9) for positioning the heat exchanger bundle (3) in the housing (5) for attaching said collector (7) to said housing (5).

Abstract: A heat exchanger (1) comprises a plurality of stacked plates (4, 12, 14) inside a box (5). The plurality of stacked plates (4, 12, 14) enable an exchange of heat between a first and a second fluid (C, G) circulating in contact with the plurality of stacked plates (4, 12, 14). The plurality of stacked plates (4, 12, 14) comprise a stress area (70) intended to withstand heat variations that may cause mechanical stress. The heat exchanger (1) further comprises a reinforcement (71) that is in contact with the stress area (70) and the box (5).

Abstract: The invention relates to a testable integrated circuit. In order to replace ground and VDD in certain points of such a circuit, the circuit comprises a cell (34) which comprises a flipflop (11) and means (31) able to set the output voltage of the cell when the circuit is in the operation mode. These means for setting the output voltage are controlled by a control signal (15) which depends on the mode signal that indicates whether the signal is in the test mode or in the operation mode.

Abstract: The invention relates to a testable integrated circuit. In order to replace ground and VDD in certain points of such a circuit, the circuit comprises a cell (34) which comprises a flipflop (11) and means (31) able to set the output voltage of the cell when the circuit is in the operation mode. These means for setting the output voltage are controlled by a control signal (15) which depends on the mode signal that indicates whether the signal is in the test mode or in the operation mode.

Abstract: The invention relates to a testable integrated circuit. In order to replace ground and VDD in certain points of such a circuit, the circuit comprises a cell (34) which comprises a flipflop (11) and means (31) able to set the output voltage of the cell when the circuit is in the operation mode. These means for setting the output voltage are controlled by a control signal (15) which depends on the mode signal that indicates whether the signal is in the test mode or in the operation mode.

Abstract: The frequency divider for high-frequency clock signal comprises: a shift register (8) having cells (10-13) for storing each bit of an initial word, said cells being series connected in a loop (14), and said shift register being capable of shifting each bit of the initial word from the cell in which it is stored to the next cell in the loop at a rate clocked by the high-frequency clock signal, and wherein an output terminal (6) for outputting a frequency-divided clock signal is connected to the output of one cell of the loop of series-connected cells.

Abstract: The frequency divider for high-frequency clock signal comprises: a shift register (8) having cells (10-13) for storing each bit of an initial word, said cells being series connected in a loop (14), and said shift register being capable of shifting each bit of the initial word from the cell in which it is stored to the next cell in the loop at a rate clocked by the high-frequency clock signal, and wherein an output terminal (6) for outputting a frequency-divided clock signal is connected to the output of one cell of the loop of series-connected cells.

Abstract: The invention relates to a testable integrated circuit. In order to replace ground and VDD in certain points of such a circuit, the circuit comprises a cell (34) which comprises a flipflop (11) and means (31) able to set the output voltage of the cell when the circuit is in the operation mode. These means for setting the output voltage are controlled by a control signal (15) which depends on the mode signal that indicates whether the signal is in the test mode or in the operation mode.