Patents by Inventor Patrick Gros D'Aillon

Patrick Gros D'Aillon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178055
    Abstract: The present description concerns a method of manufacturing an insulating trench in a substrate, for an electronic device, comprising the following successive steps: (a) filling a trench formed in the substrate with a first insulating material; (b) depositing a first etch stop layer on the first material; (c) depositing a second layer of a second insulating material on the first etch stop layer; (d) etching down to the etch stop layer; and (e) depositing a third layer made of a third tight material.
    Type: Application
    Filed: November 14, 2023
    Publication date: May 30, 2024
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Thierno Moussa BAH, Pascal GOURAUD, Patrick GROS D'AILLON, Emilie PREVOST
  • Publication number: 20170040285
    Abstract: A planar layer of a selected material is formed on a surface of a wafer exhibiting recesses. The formation process including the steps of: a) depositing a first layer of the selected material on the surface; b) performing a chemical mechanical polishing of the first layer; c) depositing a second layer of the selected material on the first layer; and d) performing a chemical mechanical polishing of the second layer.
    Type: Application
    Filed: August 1, 2016
    Publication date: February 9, 2017
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Francois Guyader, Emmanuel Gourvest, Patrick Gros D'aillon
  • Patent number: 9397128
    Abstract: A stack of layers defines a filter and is formed by copper on hydrogenated silicon nitride supported by a carrier. The filter includes a layer of hydrogenated silicon nitride, a layer of silicon oxide on the layer of hydrogenated silicon nitride and a layer of copper on the layer of silicon oxide. The layer of hydrogenated silicon nitride may have, in a vicinity of its upper side, a ratio of a number of silicon atoms per cubic centimeter to a number of nitrogen atoms per cubic centimeter lower than 0.8 (or even lower than 0.6), with a number of silicon-hydrogen bonds smaller than or equal to 6×1021 bonds per cubic centimeter (or even smaller than 0.5×1021 bonds per cubic centimeter). The filter further includes an additional layer of copper between the layer of hydrogenated silicon nitride and the carrier.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: July 19, 2016
    Assignee: STMicroelectronics SA
    Inventors: Patrick Gros D'aillon, Michel Marty
  • Patent number: 9224775
    Abstract: An integrated circuit includes a back side illuminated image sensor formed by a substrate supporting at least one pixel, an interconnect part situated above a front side of the substrate and an anti-reflective layer situated above a back side of the substrate. The anti-reflective layer may be formed of a silicon nitride layer. An additional layer is situated above the anti-reflective layer. The additional layer is formed of one of amorphous silicon nitride or hydrogenated amorphous silicon nitride, in which the ratio of the number of silicon atoms per cubic centimeter to the number of nitrogen atoms per cubic centimeter is greater than 0.7.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: December 29, 2015
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Jean-Pierre Carrere, Patrick Gros D'Aillon, Stephane Allegret-Maret, Jean-Pierre Oddou
  • Publication number: 20150091116
    Abstract: A stack of layers defines a filter and is formed by copper on hydrogenated silicon nitride supported by a carrier. The filter includes a layer of hydrogenated silicon nitride, a layer of silicon oxide on the layer of hydrogenated silicon nitride and a layer of copper on the layer of silicon oxide. The layer of hydrogenated silicon nitride may have, in a vicinity of its upper side, a ratio of a number of silicon atoms per cubic centimeter to a number of nitrogen atoms per cubic centimeter lower than 0.8 (or even lower than 0.6), with a number of silicon-hydrogen bonds smaller than or equal to 6×1021 bonds per cubic centimeter (or even smaller than 0.5×1021 bonds per cubic centimeter). The filter further includes an additional layer of copper between the layer of hydrogenated silicon nitride and the carrier.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 2, 2015
    Applicants: STMicroelectronics SA, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Patrick Gros D'aillon, Michel Marty
  • Publication number: 20150035106
    Abstract: An integrated circuit includes a back side illuminated image sensor formed by a substrate supporting at least one pixel, an interconnect part situated above a front side of the substrate and an anti-reflective layer situated above a back side of the substrate. The anti-reflective layer may be formed of a silicon nitride layer. An additional layer is situated above the anti-reflective layer. The additional layer is formed of one of amorphous silicon nitride or hydrogenated amorphous silicon nitride, in which the ratio of the number of silicon atoms per cubic centimeter to the number of nitrogen atoms per cubic centimeter is greater than 0.7.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Jean-Pierre Carrere, Patrick Gros D'Aillon, Stephane Allegret-Maret, Jean-Pierre Oddou
  • Publication number: 20120161269
    Abstract: A front-side illuminated image sensor, including photodetection regions, charge transfer elements, and an interconnection stack, all formed at the surface of a semiconductor substrate, microcavities being formed in the interconnection stack in front of the photodetection regions, microcavities being filled with materials forming color filters including metal pigments, regions of a material forming a barrier against ionic diffusion extending on the lateral walls of the microcavities.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 28, 2012
    Applicants: STMicroelectronics S.A., Commissariat a l`Energie Atomique et aux Energies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Christophe Aumont, Jean-Pierre Oddou, Jérôme Vaillant, Patrick Gros D'Aillon