Abstract: A hybrid photonic chip comprising a plurality of semiconductor materials arranged to define a chip providing a function, wherein at least a first part of the chip is formed of materials which can be fabricated using a CMOS technique; and at least a second part of the chip which comprises non-linear crystal material and is not subjected to etching process; wherein the second part of the chip in conjunction with the first part is configured to support a propagating low loss single mode.

Abstract: The present invention relates of a photonic integrated and a method of fabricating a photonic integrated chip, PIC, configured for alignment and attachment of a laser diode in a predetermined position in which light from the laser diode is aligned with an input of the PIC; wherein the photonic chip comprises an asymmetric alignment assembly for receiving and aligning the laser diode in the predetermined position; and wherein the input comprises a coupler for receiving a laser beam from the laser diode in use.

Abstract: A hybrid photonic chip comprising a plurality of semiconductor materials arranged to define a chip providing a function, wherein at least a first part of the chip is formed of materials which can be fabricated using a CMOS technique; and at least a second part of the chip which comprises non-linear crystal material and is not subjected to etching process; wherein the second part of the chip in conjunction with the first part is configured to support a propagating low loss single mode.

Abstract: Various embodiments may provide an optical phase array. The optical phase array may include a laser source configured to emit a laser. The optical phase array may further include an integrated photonic network with n stages of optical splitters, the optical splitters being 1 ? 2 optical splitters, each optical splitter of the integrated photonic network having an input, a first output, and a second output. The integrated photonic network may be configured to separate the laser into N outputs. Each output of the N outputs may differ from a neighbouring output of the N outputs by a constant phase difference (??). N may be equal to 2 to the power of n.

Abstract: Various embodiments may provide an optical phase array. The optical phase array may include a laser source configured to emit a laser. The optical phase array may further include an integrated photonic network with n stages of optical splitters, the optical splitters being 1 ? 2 optical splitters, each optical splitter of the integrated photonic network having an input, a first output, and a second output. The integrated photonic network may be configured to separate the laser into N outputs. Each output of the N outputs may differ from a neighbouring output of the N outputs by a constant phase difference (??). N may be equal to 2 to the power of n.

Abstract: According to embodiments of the present invention, an optical device is provided. The optical device includes a waveguide structure including a floating gate, and an optical waveguide arranged spaced apart from the floating gate, wherein the optical waveguide overlaps with the floating gate, a carrier injection portion arranged spaced apart from the floating gate, and an electrode arrangement, wherein, in response to a first voltage difference applied to the electrode arrangement, the optical device is configured to inject charge carriers from the carrier injection portion to the floating gate to cause a change in refractive index of the waveguide structure, and wherein, in response to a second voltage difference applied to the electrode arrangement, the optical device is configured to drive the charge carriers from the floating gate to the optical waveguide to deplete the charge carriers.

Abstract: According to embodiments of the present invention, an optical coupling device is provided. The optical coupling device includes a substrate, and a grating arrangement including a plurality of grating elements, the plurality of grating elements being defined on one surface of the substrate, wherein the plurality of grating elements are arranged to have a first period along a first direction, and a second period along a second direction orthogonal to the first direction, the first period being different from the second period. According to further embodiments of the present invention, a photonic integrated circuit and a method of forming an optical coupling device are also provided.

Abstract: According to embodiments of the present invention, a pixel arrangement is provided. The pixel arrangement includes a plurality of pixels arranged adjacent to each other; and a substrate configured to receive the plurality of pixels, wherein each pixel of the plurality of pixels comprises a plurality of optical cells electrically coupled to each other; and an electrical interconnection electrically isolated from the plurality of optical cells, the electrical interconnection arranged to provide electrical communication between two separate conducting terminals external to the pixel.

Abstract: According to embodiments of the present invention, an optical device is provided. The optical device includes a waveguide structure including a floating gate, and an optical waveguide arranged spaced apart from the floating gate, wherein the optical waveguide overlaps with the floating gate, a carrier injection portion arranged spaced apart from the floating gate, and an electrode arrangement, wherein, in response to a first voltage difference applied to the electrode arrangement, the optical device is configured to inject charge carriers from the carrier injection portion to the floating gate to cause a change in refractive index of the waveguide structure, and wherein, in response to a second voltage difference applied to the electrode arrangement, the optical device is configured to drive the charge carriers from the floating gate to the optical waveguide to deplete the charge carriers.

Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.

Abstract: According to embodiments of the present invention, a pixel arrangement is provided. The pixel arrangement includes a plurality of pixels arranged adjacent to each other; and a substrate configured to receive the plurality of pixels, wherein each pixel of the plurality of pixels comprises a plurality of optical cells electrically coupled to each other; and an electrical interconnection electrically isolated from the plurality of optical cells, the electrical interconnection arranged to provide electrical communication between two separate conducting terminals external to the pixel.

Abstract: According to embodiments of the present invention, an optical coupling device is provided. The optical coupling device includes a substrate, and a grating arrangement including a plurality of grating elements, the plurality of grating elements being defined on one surface of the substrate, wherein the plurality of grating elements are arranged to have a first period along a first direction, and a second period along a second direction orthogonal to the first direction, the first period being different from the second period. According to further embodiments of the present invention, a photonic integrated circuit and a method of forming an optical coupling device are also provided.

Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.

Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.

Abstract: According to one aspect of the invention, there is provided a pin photodetector comprising a dopant diffusion barrier layer disposed within an active light absorbing region of the pin photodetector.

Abstract: According to embodiments of the present invention, an optical coupling device is provided. The optical coupling device includes a substrate, and a grating arrangement including a plurality of grating elements, the plurality of grating elements being defined on one surface of the substrate, wherein the plurality of grating elements are arranged to have a first period along a first direction, and a second period along a second direction orthogonal to the first direction, the first period being different from the second period. According to further embodiments of the present invention, a photonic integrated circuit and a method of forming an optical coupling device are also provided.

Abstract: According to embodiments of the present invention, a method for forming an optical modulator is provided. The method includes providing a substrate, implanting dopants of a first conductivity type into the substrate to form a first doped region, implanting dopants of a second conductivity type into the substrate to form a second doped region, wherein a portion of the second doped region is formed over and overlaps with a portion of the first doped region to form a junction between the respective portions of the first doped region and the second doped region, and wherein a remaining portion of the second doped region is located outside of the junction, and forming a ridge waveguide, wherein the ridge waveguide overlaps with at least a part of the junction.

Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.

Abstract: An optical light source is provided. The optical light source includes a waveguide including two reflectors arranged spaced apart from each other to define an optical cavity therebetween, an optical gain medium, and a coupling structure arranged to couple light between the optical cavity and the optical gain medium.

Abstract: Structures for III-nitride GaN high electron mobility transistors (HEMT), method for fabricating for GaN devices and integrated chip-level power systems using the GaN devices are provided. The GaN HEMT structure includes a substrate, an AlGaN/GaN heterostructure grown on the substrate, and a normally-off GaN device fabricated on the AlGaN/GaN heterostructure. The AlGaN/GaN heterostructure includes a GaN buffer layer and an AlGaN barrier layer. The integrated chip-level power system includes a substrate, an AlGaN/GaN heterostructure layer grown on the substrate and a plurality of GaN devices. The AlGaN/GaN heterostructure layer includes a GaN buffer layer and an AlGaN barrier layer and is formed into mesa areas and valley areas. Each of the plurality of GaN devices are fabricated on a separate one of the mesa areas.