Patents by Inventor Patrick Themins

Patrick Themins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus to facilitate system to system protocol exchange in back to back non-transparent bridges
    Patent number: 9594717
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: March 14, 2017
    Assignee: INTEL CORPORATION
    Inventors: Kimberly Davis, Mark Sullivan, James Mitchell, Patrick Themins
  • METHOD AND APPARATUS TO FACILITATE SYSTEM TO SYSTEM PROTOCOL EXCHANGE IN BACK TO BACK NON-TRANSPARENT BRIDGES
    Publication number: 20150199294
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Application
    Filed: March 27, 2015
    Publication date: July 16, 2015
    Applicant: INTEL CORPORATION
    Inventors: Kimberly DAVIS, Mark SULLIVAN, James MITCHELL, Patrick THEMINS
  • Method and apparatus to facilitate system to system protocol exchange in back to back non-transparent bridges
    Patent number: 8996780
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: March 31, 2015
    Assignee: Intel Corporation
    Inventors: Kimberly Davis, Mark Sullivan, James Mitchell, Patrick Themins
  • METHOD AND APPARATUS TO FACILITATE SYSTEM TO SYSTEM PROTOCOL EXCHANGE IN BACK TO BACK NON-TRANSPARENT BRIDGES
    Publication number: 20130042045
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 14, 2013
    Inventors: Kimberly DAVIS, Mark Sullivan, James Mitchell, Patrick Themins
  • Method and apparatus to facilitate system to system protocol exchange in back to back non-transparent bridges
    Patent number: 8244951
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: August 14, 2012
    Assignee: Intel Corporation
    Inventors: Kimberly Davis, Mark Sullivan, James Mitchell, Patrick Themins
  • METHOD AND APPARATUS TO FACILITATE SYSTEM TO SYSTEM PROTOCOL EXCHANGE IN BACK TO BACK NON-TRANSPARENT BRIDGES
    Publication number: 20100074264
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Application
    Filed: September 25, 2008
    Publication date: March 25, 2010
    Inventors: Kimberly Davis, Mark Sullivan, James Mitchell, Patrick Themins
  • Test access architecture for testing of circuits modules at an intermediate node within an integrated circuit chip
    Patent number: 5604432
    Abstract: A test access architecture is implemented which allows embedded testing of reusable modules and their interconnections with each other and with primary system inputs and outputs, utilizing reusable test vectors regardless of the configuration of the integrated circuit. Also provided is a method and apparatus for controlling and observing signals within the logic of a module, using the same test access architecture.
    Type: Grant
    Filed: November 5, 1993
    Date of Patent: February 18, 1997
    Assignee: Intel Corporation
    Inventors: Alan Moore, Patrick A. Themins
  • Apparatus for a test access architecture for testing of modules within integrated circuits
    Patent number: 5534774
    Abstract: A test access architecture is implemented which allows embedded testing of reusable modules and their interconnections with each other and with primary system inputs and outputs, utilizing reusable test vectors regardless of the configuration of the integrated circuit. Also provided is a method and apparatus for controlling and observing signals within the logic of a module, using the same test access architecture.
    Type: Grant
    Filed: April 23, 1992
    Date of Patent: July 9, 1996
    Assignee: Intel Corporation
    Inventors: Alan Moore, Patrick A. Themins