Abstract: A power supply system includes a voltage application source, and a switched mode power supply having an output coupled to the voltage application source through a first path and through a second path different from the first path. A first node is coupled to the output of the switched mode power supply, the switched mode power supply being configured to couple the first node to the voltage application source through the first path in a first operating mode and through the second path in a different second operating mode. A digital regulator is coupled to the first node. A digital circuit is coupled to an output of the digital regulator. An analog regulator is coupled to the first node and an analog circuit coupled to an output of the analog regulator.

Abstract: In an embodiment, an SMPS comprises a half-bridge, and a driver configured to drive the half-bridge based on a PWM signal. The SMPS further comprising a first circuit coupled between the output of the driver and a control terminal of a high-side transistor of the half-bridge, wherein the first circuit is configured to maintain the first transistor on when the PWM signal has a duty cycle that is substantially 100%.

Abstract: A device for controlling a first voltage with a second voltage includes a first terminal of application of the second voltage and a second terminal for supplying the first voltage. A comparator has a first input terminal connected to the first terminal and has a second input terminal receiving information representative of the first voltage. At least one first current source of programmable intensity is connected to the second input terminal of the comparator.

Abstract: A power supply system includes a voltage application source, and a switched mode power supply having an output coupled to the voltage application source through a first path and through a second path different from the first path. A first node is coupled to the output of the switched mode power supply, the switched mode power supply being configured to couple the first node to the voltage application source through the first path in a first operating mode and through the second path in a different second operating mode. A digital regulator is coupled to the first node. A digital circuit is coupled to an output of the digital regulator. An analog regulator is coupled to the first node and an analog circuit coupled to an output of the analog regulator.

Abstract: A power supply system includes a voltage application source, and a switched mode power supply having an output coupled to the voltage application source through a first path and through a second path different from the first path. A first node is coupled to the output of the switched mode power supply, the switched mode power supply being configured to couple the first node to the voltage application source through the first path in a first operating mode and through the second path in a different second operating mode. A digital regulator is coupled to the first node. A digital circuit is coupled to an output of the digital regulator. An analog regulator is coupled to the first node and an analog circuit coupled to an output of the analog regulator.

Abstract: In an embodiment, an SMPS comprises a half-bridge, and a driver configured to drive the half-bridge based on a PWM signal. The SMPS further comprising a first circuit coupled between the output of the driver and a control terminal of a high-side transistor of the half-bridge, wherein the first circuit is configured to maintain the first transistor on when the PWM signal has a duty cycle that is substantially 100%.

Abstract: In an embodiment, an SMPS comprises a half-bridge, and a driver configured to drive the half-bridge based on a PWM signal. The SMPS further comprising a first circuit coupled between the output of the driver and a control terminal of a high-side transistor of the half-bridge, wherein the first circuit is configured to maintain the first transistor on when the PWM signal has a duty cycle that is substantially 100%.

Abstract: A current sense amplifier includes: first and second intermediate nodes coupled to first and second nodes of a sense resistor by a chopper, and to respective branches of a current mirror; a differential amplifier having inputs coupled to the first and second intermediate nodes and adapted to generate first and second voltage signals; and first and second transistors adapted to be controlled by the first and second voltage signals respectively and each having one of its main current conducting nodes coupled to a respective one of the first and second intermediate nodes.

Abstract: In an embodiment, an SMPS comprises a half-bridge, and a driver configured to drive the half-bridge based on a PWM signal. The SMPS further comprising a first circuit coupled between the output of the driver and a control terminal of a high-side transistor of the half-bridge, wherein the first circuit is configured to maintain the first transistor on when the PWM signal has a duty cycle that is substantially 100%.

Abstract: A power supply system includes a voltage application source, and a switched mode power supply having an output coupled to the voltage application source through a first path and through a second path different from the first path. A first node is coupled to the output of the switched mode power supply, the switched mode power supply being configured to couple the first node to the voltage application source through the first path in a first operating mode and through the second path in a different second operating mode. A digital regulator is coupled to the first node. A digital circuit is coupled to an output of the digital regulator. An analog regulator is coupled to the first node and an analog circuit coupled to an output of the analog regulator.

Abstract: A current sense amplifier includes: first and second intermediate nodes coupled to first and second nodes of a sense resistor by a chopper, and to respective branches of a current mirror; a differential amplifier having inputs coupled to the first and second intermediate nodes and adapted to generate first and second voltage signals; and first and second transistors adapted to be controlled by the first and second voltage signals respectively and each having one of its main current conducting nodes coupled to a respective one of the first and second intermediate nodes.

Abstract: A method of controlling a current flowing through a load including the steps of: applying a first transfer function representative of the load to a first voltage to obtain a second voltage; applying the second voltage to a first terminal of a circuit for generating the current; sampling a third voltage between first and second terminals of the load; comparing the third voltage with the second voltage; and determining the current to be supplied to the load according to the result of the comparison.

Abstract: An embodiment circuit includes a first voltage divider coupled between a first voltage level and a ground potential. The circuit further includes an error amplifier having a first input terminal coupled to a node between a first resistive element and a second resistive element of the first voltage divider. The circuit further includes a second voltage divider coupled between a second voltage level and a reference voltage, wherein a second input terminal of the error amplifier is coupled to a node between a third resistive element and a fourth resistive element of the second voltage divider, and wherein an output voltage of the error amplifier is configured to control a potential difference between the first voltage level and the second voltage level.

Abstract: An embodiment circuit includes a first voltage divider coupled between a first voltage level and a ground potential. The circuit further includes an error amplifier having a first input terminal coupled to a node between a first resistive element and a second resistive element of the first voltage divider. The circuit further includes a second voltage divider coupled between a second voltage level and a reference voltage, wherein a second input terminal of the error amplifier is coupled to a node between a third resistive element and a fourth resistive element of the second voltage divider, and wherein an output voltage of the error amplifier is configured to control a potential difference between the first voltage level and the second voltage level.

Abstract: A device for controlling a first voltage with a second voltage includes a first terminal of application of the second voltage and a second terminal for supplying the first voltage. A comparator has a first input terminal connected to the first terminal and has a second input terminal receiving information representative of the first voltage. At least one first current source of programmable intensity is connected to the second input terminal of the comparator.

Abstract: A circuit is for controlling a power transistor of a DC/DC converter. The circuit may include first and second first transistors coupled in series between a first reference voltage and a control terminal of the power transistor, the first and second transistors defining a first junction node. The circuit may include third and fourth transistors coupled in series between the control terminal and a second reference voltage, the third and fourth transistors defining a second junction node. The first and second transistors may have a first conductivity type different from a second conductivity type of the third and fourth transistors. The circuit may include a capacitive element coupled between the first and second junction nodes.

Abstract: A method of controlling a current flowing through a load including the steps of: applying a first transfer function representative of the load to a first voltage to obtain a second voltage; applying the second voltage to a first terminal of a circuit for generating the current; sampling a third voltage between first and second terminals of the load; comparing the third voltage with the second voltage; and determining the current to be supplied to the load according to the result of the comparison.

Abstract: A diode control device include a first terminal for receiving a first power supply voltage and a second terminal for receiving a second power supply voltage. A circuit of the diode control device applies a regulated voltage on the anode of the diode in response to a control voltage. The control voltage is equal to a preset voltage when a reference voltage is less than or equal to zero. Conversely, when the reference voltage is greater than zero, the control voltage is equal to the sum of the present voltage and a difference between cathode voltage of the diode and the reference voltage.

Abstract: A diode control device include a first terminal for receiving a first power supply voltage and a second terminal for receiving a second power supply voltage. A circuit of the diode control device applies a regulated voltage on the anode of the diode in response to a control voltage. The control voltage is equal to a preset voltage when a reference voltage is less than or equal to zero. Conversely, when the reference voltage is greater than zero, the control voltage is equal to the sum of the present voltage and a difference between cathode voltage of the diode and the reference voltage.

Abstract: The output of a Radio Frequency (RF) Power Amplifier (PA) is sampled and down-converted, and the amplitude envelope of the baseband feedback signal is extracted. This is compared to the envelope of a transmission signal, and the envelope tracking modulation of the RF PA supply voltage is adaptively pre-distorted to achieve a constant ISO-Gain (and phase) in the RF PA. In particular, a nonlinear function is interpolated from a finite number gain values calculated from the feedback and transmission signals. This nonlinear function is then used to pre-distort the transmission signal envelope, resulting in a constant gain at the RF PA over a wide range of supply voltage values. Since the gains are calculated from a feedback signal, the pre-distortion may be recalculated at event triggers, such as an RF frequency change.