Patents by Inventor Patrizio Vinciarelli
Patrizio Vinciarelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20180041125Abstract: A switching power converter converts power from an input source for delivery to a load at the converter output. The converter comprises at least two switches connected in series across either the input source or the output, and an inductor connected to a central node between the two switches. A controller operates the converter in a series of converter operating cycles, each operating cycle comprising an input phase, during which one of the two switches is conductive, the inductor receives energy from the input source, and a current in the inductor is increasing positively, phase. The controller is configured to adjust the duration of the input phase, and the amount of energy stored in the inductor at the end of the input phase, as a function of a an amount of energy required to charge or discharge the node capacitance during the energy recycling phase.Type: ApplicationFiled: August 3, 2016Publication date: February 8, 2018Applicant: VLT, Inc.Inventor: Patrizio Vinciarelli
-
Publication number: 20170358978Abstract: A power system includes a power conversion stage that receives power from an input source and delivers power to a load via a power distribution bus. The power distribution bus may include a DC transformer such as a fixed ratio bus converter or VTM having an equivalent series resistance. A control system samples the voltage delivered by the power conversion stage at a location close to the output of the power conversion stage, and the load voltage at a location close to the load. The samples may be synchronized by means of a data bus that provides communication between a control device and an output monitor. Synchronization may be accomplished within a sampling period that is short relative to changes in the voltages and currents. Each set of samples may be used to determine a value of the bus resistance. Multiple samples may be averaged to improve accuracy in the determination.Type: ApplicationFiled: June 10, 2016Publication date: December 14, 2017Inventor: Patrizio Vinciarelli
-
Patent number: 9660537Abstract: A power converter provides a low-voltage output using a full-bridge fault-tolerant rectification circuit. The output circuit uses controlled switches as rectifiers. A fault detection circuit monitors circuit conditions. Upon detection of a fault, the switches are disabled decoupling the power converter from the system. A common-source dual MOSFET device includes a plurality of elements arranged in alternating patterns on a semiconductor die. A common-source dual synchronous rectifier includes control circuitry powered from the drain to source voltage of the complementary switch. A DC-to-DC transformer converts power from an input source to a load using a fixed voltage transformation ratio. A clamp phase may be used to reduce power losses in the converter at light loads, control the effective output resistance of the converter, effectively regulate the voltage transformation ratio, provide narrow band output regulation, and control the rate of change of output voltage for example during start up.Type: GrantFiled: April 9, 2015Date of Patent: May 23, 2017Assignee: VLT, Inc.Inventor: Patrizio Vinciarelli
-
Patent number: 9584026Abstract: Low-voltage outputs are provided by full-bridge rectification using controlled switches with fault detection monitoring of circuit conditions and disabling switches upon detection of a fault to decouple the converter from the system. Common-source dual MOSFET devices include elements arranged in alternating patterns on the die. Common-source dual synchronous rectifiers include control circuitry powered from the voltage across the complementary switch. A DC-to-DC transformer converts power using a fixed voltage transformation ratio. A clamp phase may be used to reduce power losses, control the output resistance, effectively regulate the voltage transformation ratio, provide narrow band output regulation, and control the rate of change of output voltage. A new point of load converter includes input driver circuitry removed from and output circuitry located at the point of load, with a transformer located near the output circuit and an AC bus between the driver circuit and the primary winding of the transformer.Type: GrantFiled: April 8, 2015Date of Patent: February 28, 2017Assignee: VLT, Inc.Inventor: Patrizio Vinciarelli
-
Patent number: 9571084Abstract: Low-voltage outputs are provided by full-bridge rectification using controlled switches with fault detection monitoring of circuit conditions and disabling switches upon detection of a fault to decouple the converter from the system. Common-source dual MOSFET devices include elements arranged in alternating patterns on the die. Common-source dual synchronous rectifiers include control circuitry powered from the voltage across the complementary switch. A DC-to-DC transformer converts power using a fixed voltage transformation ratio. A clamp phase may be used to reduce power losses, control the output resistance, effectively regulate the voltage transformation ratio, provide narrow band output regulation, and control the rate of change of output voltage. A new point of load converter includes input driver circuitry removed from and output circuitry located at the point of load, with a transformer located near the output circuit and an AC bus between the driver circuit and the primary winding of the transformer.Type: GrantFiled: April 8, 2015Date of Patent: February 14, 2017Assignee: VLT, Inc.Inventor: Patrizio Vinciarelli
-
Patent number: 9516761Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.Type: GrantFiled: March 2, 2015Date of Patent: December 6, 2016Assignee: VLT, Inc.Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
-
Patent number: 9508485Abstract: A signal isolator apparatus includes a first substrate for supporting input circuitry including a high frequency oscillator circuit for receiving an input signal, a second substrate for supporting output circuitry including a detector circuit for providing an output signal; and a third substrate having parallel conductive layers separated by insulation. The third substrate has an upper conductive shield formed in a second conductive layer and a lower conductive shield formed in a fifth conductive layer. A transformer is formed between the upper and lower conductive shields and includes a primary winding formed in a third conductive layer and a secondary winding formed in a fourth conductive layer. The oscillator circuit is connected to the primary winding and adapted to excite the primary winding at a first frequency in response to the input signal, and the detector circuit is connected to the secondary winding and adapted to selectively sense the first frequency and provide the output signal.Type: GrantFiled: January 14, 2015Date of Patent: November 29, 2016Assignee: VLT, Inc.Inventor: Patrizio Vinciarelli
-
Publication number: 20160302312Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation. The mold may be used to form part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area.Type: ApplicationFiled: June 17, 2016Publication date: October 13, 2016Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
-
Patent number: 9439297Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.Type: GrantFiled: March 2, 2015Date of Patent: September 6, 2016Assignee: VLT, Inc.Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
-
Patent number: 9413259Abstract: Power from an AC source at a source voltage is converted for delivery to a load at a DC load voltage, where the source voltage may vary between a high line voltage and a low line voltage in a normal operating range. DC-DC voltage transformation and isolation are provided in a first power conversion stage, the first stage having a CA input for receiving power from the source and a CA output for delivering a galvanically isolated unregulated AC adapter module (UAAM) voltage. First stage circuitry for performing the first power conversion stage is provided in a self-contained adapter module having input terminals for connection to the AC source and an output connected to the CA output for providing power to a second power conversion stage wherein the second power conversion stage is external to the adapter module.Type: GrantFiled: June 3, 2013Date of Patent: August 9, 2016Assignee: VLT, Inc.Inventor: Patrizio Vinciarelli
-
Patent number: 9402319Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation. The mold may be used to form part of the finished product. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features. Wide cuts may be made in the molds after encapsulation reducing thermal stresses. Blank mold panels may be machined to provide some or all of the above features in an on-demand manufacturing system. Connection adapters may be provided to use the modules in vertical or horizontal mounting positions in connector, through-hole, surface-mount solder variations.Type: GrantFiled: May 11, 2012Date of Patent: July 26, 2016Assignee: VLT, Inc.Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
-
Patent number: 9387633Abstract: An encapsulated electronic device includes a magnetically permeable core structure which is exposed within and coplanar with a flat top surface of the device. A bottom surface of the core may be exposed within the bottom surface of the device. The bottom core surface may be recessed beneath, coplanar with, or protruding from the bottom surface of the device. Alternatively the bottom surface may be encapsulated within the device. A method for manufacturing the exposed core package includes positioning a first component relative to a second component before encapsulating the device. An improved planar magnetic core structure includes internal bevels having a radius greater than or equal to 15% and preferably 25%, 35%, or as much as 50% of the core thickness to reduce concentration of the magnetic field around the internal corners.Type: GrantFiled: April 22, 2013Date of Patent: July 12, 2016Assignee: VI Chip, Inc.Inventors: Patrizio Vinciarelli, Michael B. LaFleur
-
Patent number: 9325247Abstract: A power converter including a transformer, a resonant circuit including the transformer and a resonant capacitor having a characteristic resonant frequency and period, and output circuitry connected to the transformer for delivering a rectified output voltage to a load. Primary switches drive the resonant circuit, a clamp switch is connected to shunt the resonant capacitor, and a switch controller operates the primary switches and the clamp switch in a series of converter operating cycles. The converter operating cycles include power transfer intervals including resonant intervals during which a resonant current at the characteristic resonant frequency flows through a winding of the transformer; and a clamp interval during which the clamp switch provides a low impedance shunt across the resonant capacitor holding the resonant capacitor at a voltage at or near zero volts. The operating cycles may also include energy recycling intervals for charging and discharging capacitances within the converter.Type: GrantFiled: October 2, 2015Date of Patent: April 26, 2016Assignee: VLT, Inc.Inventor: Patrizio Vinciarelli
-
Patent number: 9269661Abstract: A semiconductor device includes a semiconductor substrate with doped regions of a first type and doped regions of a second type. A first metallization layer connects to the doped regions of the first type through conductive paths, such that current is able to flow within the metallization layer along a plurality of linear axes. A second metallization layer connects to the doped regions of the second type through conductive paths, such that that current is able to flow within the metallization layer along a plurality of linear axes. Contacts on an exterior surface of the semiconductor device can be arranged concentrically.Type: GrantFiled: January 14, 2015Date of Patent: February 23, 2016Assignee: VLT, INC.Inventors: Patrizio Vinciarelli, Sergey Luzanov
-
Patent number: 9166481Abstract: A method of synchronously operating a power converter in a series of converter operating cycles includes providing an oscillator for generating clock signals at an oscillator frequency, and generating timing control signals for each of multiple events based upon the clock signals. The method further includes to: (i) turn a primary switch ON and OFF at times when essentially zero voltage is impressed across the primary switch and essentially zero resonant current is flowing in the primary switch; and (ii) turn a secondary switch ON and OFF at times when essentially zero current is flowing in the secondary switch and essentially zero voltage is impressed across the secondary switch. The oscillator frequency is preset, and the timing of the timing control signals for one or more selected events may be set independently of other timing control signals and events.Type: GrantFiled: March 14, 2013Date of Patent: October 20, 2015Assignee: VLT, INC.Inventors: Patrizio Vinciarelli, Sergey Luzanov
-
Patent number: D752000Type: GrantFiled: November 20, 2014Date of Patent: March 22, 2016Assignee: VLT, Inc.Inventors: Patrizio Vinciarelli, Sergey Luzanov
-
Patent number: D754083Type: GrantFiled: October 17, 2013Date of Patent: April 19, 2016Assignee: VLT, Inc.Inventors: Patrizio Vinciarelli, Michael B. LaFleur
-
Patent number: D775092Type: GrantFiled: March 2, 2016Date of Patent: December 27, 2016Assignee: VLT, INC.Inventors: Patrizio Vinciarelli, Michael B. LaFleur
-
Patent number: D775093Type: GrantFiled: March 2, 2016Date of Patent: December 27, 2016Assignee: VLT, INC.Inventors: Patrizio Vinciarelli, Michael B. LaFleur
-
Patent number: D798249Type: GrantFiled: March 2, 2016Date of Patent: September 26, 2017Assignee: VLT, Inc.Inventors: Patrizio Vinciarelli, Michael B. LaFleur