Patents by Inventor Paul C. deDood

Paul C. deDood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and methods for generating cell layouts
    Patent number: 5764533
    Abstract: An apparatus for generating a cell layout representative of a CMOS logic cell. The apparatus includes a pMOS transistor layout generator for generating a first set of layout data representative of a plurality of substantially similar pMOS relatively low strength transistor groups that are oriented along a first direction. The apparatus further includes an nMOS transistor layout generator for generating a second set of layout data representative of a plurality of substantially similar nMOS relatively low strength transistor groups that are also oriented along the first direction.
    Type: Grant
    Filed: August 1, 1995
    Date of Patent: June 9, 1998
    Assignee: Sun MicroSystems, Inc.
    Inventor: Paul C. deDood