Abstract: A printed wafer. A design is printed within a peripheral portion of the wafer. The peripheral portion of the wafer is between an outer boundary of an active portion of the wafer and an outer boundary of the wafer. The design may be a copy of a portion of a pattern that exists on a reticle of an exposure apparatus. The pattern may includes pattern elements such that adjacent pattern elements are separated by a spacing of about a sum of a first design tolerance (based on how accurately a reticle blind can be positioned within the exposure apparatus) and a second design tolerance (based on how sharply an edge of the reticle blind can be focused on the wafer by a lens). The design may visible to a naked eye unaided with no portion of the printed design within the active portion of the wafer.

Abstract: A printed wafer. A design is printed within a peripheral portion of the wafer. The peripheral portion of the wafer is between an outer boundary of an active portion of the wafer and an outer boundary of the wafer. The design may be a copy of a portion of a pattern that exists on a reticle of an exposure apparatus. The pattern may includes pattern elements such that adjacent pattern elements are separated by a spacing of about a sum of a first design tolerance (based on how accurately a reticle blind can be positioned within the exposure apparatus) and a second design tolerance (based on how sharply an edge of the reticle blind can be focused on the wafer by a lens). The design may visible to a naked eye unaided with no portion of the printed design within the active portion of the wafer.

Abstract: A method for manufacturing a stitched space in a semiconductor circuit implements a photolithographic process for printing one or more image fields on a wafer surface, each image field corresponding to a portion of a circuit or device and including a space that is to be stitched in adjacent image fields. The space to be stitched that is produced from an image field is overlapped onto the space to be stitched produced from the adjacent image field, however, the overlapped space from the adjacent image fields is intentionally misaligned. The stitched space is then subject to the double light exposure dose to print the stitched space, with the result that an overlay tolerance of the stitched space is improved.

Abstract: An exposure apparatus and printed wafer such that a design is printed within a peripheral portion of the wafer. The peripheral portion of the wafer is between an outer boundary of an active portion of the wafer and an outer boundary of the wafer. The exposure apparatus comprises a lens, a reticle that includes a pattern, and a reticle blind. The reticle blind blocks a first portion of light that is passed through the exposure apparatus. A transparent portion of the reticle transmits a remaining portion of the light. The lens focuses the remaining portion of the light onto the wafer such that an image of a portion of the pattern is printed as the design within the peripheral portion of the wafer. The printed design is a function of where the reticle blind is positioned relative to the pattern.

Abstract: A method for manufacturing a stitched space in a semiconductor circuit implements a photolithographic process for printing one or more image fields on a wafer surface, each image field corresponding to a portion of a circuit or device and including a space that is to be stitched in adjacent image fields. The space to be stitched that is produced from an image field is overlapped onto the space to be stitched produced from the adjacent image field, however, the overlapped space from the adjacent image fields is intentionally misaligned. The stitched space is then subject to the double light exposure dose to print the stitched space, with the result that an overlay tolerance of the stitched space is improved.

Abstract: The present invention is a system and method for use with alignment marks and search algorithms of diffraction pattern detection tools. The system and method of the invention significantly increases the capture range of diffraction pattern detection methods and enable more efficient operation of tools employing such detection methods.

Abstract: Disclosed are a method and system for calibrating grid parameters for a photolithographic tool. One embodiment of the invention utilizes at least two artifacts located on the wafer stage. The artifacts are located outside of the area where a substrate would be placed. Typically, four artifacts are used, with two artifacts located along the same axis. The stage moves a first artifact to the alignment system and the system measures the location of the first artifact. The stage then moves the second artifact, which is on the same axis but on the other side of the wafer stage, under the alignment system and measures the location of the second artifact. This is repeated for the other two artifacts that line up in a second axis (i.e., perpendicular to the first axis). Grid offsets are calculated to provide, for example, grid magnification and rotation calibrations.

Abstract: A method, exposure apparatus, and printed wafer such that a design is printed within a peripheral portion of the wafer. The peripheral portion of the wafer is between an outer boundary of an active portion of the wafer and an outer boundary of the wafer. The exposure apparatus comprises a lens, a reticle that includes a pattern, and a reticle blind. The reticle blind blocks a first portion of light that is passed through the exposure apparatus. A transparent portion of the reticle transmits a remaining portion of the light. The lens focuses the remaining portion of the light onto the wafer such that an image of a portion of the pattern is printed as the design within the peripheral portion of the wafer. The printed design is a function of where the reticle blind is positioned relative to the pattern.

Abstract: A method, exposure apparatus, and printed wafer such that a design is printed within a peripheral portion of the wafer. The peripheral portion of the wafer is between an outer boundary of an active portion of the wafer and an outer boundary of the wafer. The exposure apparatus comprises a lens, a reticle that includes a pattern, and a reticle blind. The reticle blind blocks a first portion of light that is passed through the exposure apparatus. A transparent portion of the reticle transmits a remaining portion of the light. The lens focuses the remaining portion of the light onto the wafer such that an image of a portion of the pattern is printed as the design within the peripheral portion of the wafer. The printed design is a function of where the reticle blind is positioned relative to the pattern.

Abstract: Photolithography tools have alignment systems for aligning a level to be printed with a level already on the wafer. Commonly a photolithography tool has several alignment systems Also, wafers may have several alignment marks, and the various alignment systems may be capable of reading several of the alignment marks. The present invention provides a method of selecting the alignment system-alignment mark combination that gives the most accurate alignment to a previous level. The inventors found that residual errors provide a metric by which to evaluate alignment system-alignment mark combinations. The combination with the least residual error is selected. Alternatively data for actual overlay measurements is compared with alignment data for each alignment system-alignment mark combination, and the combination that has the best correlation to the overlay data is selected.

Abstract: A vacuum chuck/insert assembly (100) for firmly supporting a semiconductor wafer (106) during wafer processing. The vacuum chuck comprises a chuck (102) and a removable insert (104). The chuck includes a base (108) and a plurality of spacers (112) for holding the insert in spaced relationship to the base of the chuck. The chuck further includes first and second vacuum seals (116, 118) and vacuum ports (128) extending through the base of the chuck. The insert includes a base (132) and a plurality of spacers (136) for holding the wafer in spaced relationship to the base of the insert. The insert further includes a vacuum seal (140) and vacuum ports (146) extending through the base of the insert. During operation, vacuum applied to the vacuum chuck/insert assembly holds the insert firmly in contact with the chuck and the wafer firmly in contact with the insert.

Abstract: A vacuum chuck/insert assembly (100) for firmly supporting a semiconductor wafer (106) during wafer processing. The vacuum chuck comprises a chuck (102) and a removable insert (104). The chuck includes a base (108) and a plurality of spacers (112) for holding the insert in spaced relationship to the base of the chuck. The chuck further includes first and second vacuum seals (116, 118) and vacuum ports (128) extending through the base of the chuck. The insert includes a base (132) and a plurality of spacers (136) for holding the wafer in spaced relationship to the base of the insert. The insert further includes a vacuum seal (140) and vacuum ports (146) extending through the base of the insert. During operation, vacuum applied to the vacuum chuck/insert assembly holds the insert firmly in contact with the chuck and the wafer firmly in contact with the insert.