Abstract: An apparatus for synchronizing chroma and luma data includes a first handshake block for luma data, a second handshake block for chroma data, and a means for providing a handshake signal to the first block and to the second block based at least in part on a determination that they are both ready to transfer data, and further for inhibiting provision of the handshake signal based at least in part on a determination that at least one of the first block and the second block is not ready to transfer data.

Abstract: A method for dynamic contrast improvement of video data includes the steps of analyzing a portion of a video frame, and forcing a start of DCI transfer function computations in response to an end of the analysis of the portion of the video frame.

Abstract: An apparatus for delaying video line data between a sending device and a receiving device is provided. The apparatus includes a single port random access memory (“RAM”) and a processing arrangement including a first storage device coupled to the RAM and a second storage device coupled to the RAM.

Abstract: An apparatus for synchronizing chroma and luma data includes a first handshake block luma data, a second handshake block for chroma data, and a means for providing a handshake signal to the first block and to the second block based at least in part on a determination that they are both ready to transfer data, and further for inhibiting provision of the handshake signal based at least in part on a determination that at least one of the first block and the second block is not ready to transfer data.

Abstract: A method for dynamic contrast improvement of video data includes the steps of analyzing a portion of a video frame, and forcing a start of DCI transfer function computations in response to an end of the analysis of the portion of the video frame.

Abstract: In order to increase the speed of the transfer of control data to an OSD circuit, and to eliminate "holes" in memory caused by the use of memory mapped registers, dual use is made of the serial data port of the OSD circuit to accomplish two distinct tasks, serial transfer of graphics data and serial transfer of the control data. The on-screen display apparatus includes an OSD circuit for generating an graphics signal for display on a display screen, a controller coupled to the OSD circuit, for controlling the OSD circuit, and a VRAM including a first area for storing graphics data and a second area for storing control data for the OSD circuit. The VRAM has a parallel input/output port coupled to the controller and a serial output port coupled to the OSD circuit, the serial output port conveys the graphics data from the first area of the VRAM to the OSD circuit for processing and display.