Patents by Inventor Paul E. Dodd

Paul E. Dodd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070270071
    Abstract: The invention relates to a nonwoven fabric towel comprising about 25 to 75% by weight a first fiber comprising a polyester or polyester co-polymer staple fiber having a staple length of between 3 and 6 inches and a surface area per unit length of between approximately 0.2 micrometer2/cm to 1.2 micrometer2/cm, about 25 to 50% by weight a second fiber comprising a multi-segment splitable staple fiber comprising a first component being a polyester or polyester co-polymer component and a second component being a polyamide component or a polyester or polyester co-polymer incompatible with the first component, wherein weight ratio of the first component and the second component is between 40:60 and 80:20, and wherein the first component and the second component have a denier per staple filament of between 0.05 and 0.5, wherein the nonwoven fabric towel is bonded with a stitches of a bulkable yarn, and wherein at least the first or second fiber comprises a hydrophilic surface treatment.
    Type: Application
    Filed: May 18, 2006
    Publication date: November 22, 2007
    Inventors: J. Travis Greer, Paul E. Dodd, Karen H. Stavrakas, Nathan B. Emery
  • Patent number: 6268630
    Abstract: A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: July 31, 2001
    Assignee: Sandia Corporation
    Inventors: James R. Schwank, Marty R. Shaneyfelt, Bruce L. Draper, Paul E. Dodd