Patents by Inventor Paul Edward Gee

Paul Edward Gee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8716154
    Abstract: Aspects of the disclosure pertain to methods of depositing conformal silicon oxide multi-layers on patterned substrates. The conformal silicon oxide multi-layers are each formed by depositing multiple sub-layers. Sub-layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS) and an oxygen-containing precursor into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. A plasma treatment may follow formation of sub-layers to further improve conformality and to decrease the wet etch rate of the conformal silicon oxide multi-layer film. The deposition of conformal silicon oxide multi-layers grown according to embodiments have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: May 6, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Sidharth Bhatia, Paul Edward Gee, Shankar Venkataraman
  • Patent number: 8664127
    Abstract: Aspects of the disclosure pertain to methods of depositing silicon oxide layers on substrates. In embodiments, silicon oxide layers are deposited by flowing a silicon-containing precursor having a Si—O bond, an oxygen-containing precursor and a second silicon-containing precursor, having both a Si—C bond and a Si—N bond, into a semiconductor processing chamber to form a conformal liner layer. Upon completion of the liner layer, a gap fill layer is formed by flowing a silicon-containing precursor having a Si—O bond, an oxygen-containing precursor into the semiconductor processing chamber. The presence of the conformal liner layer improves the ability of the gap fill layer to grow more smoothly, fill trenches and produce a reduced quantity and/or size of voids within the silicon oxide filler material.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: March 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Sidharth Bhatia, Hiroshi Hamana, Paul Edward Gee, Shankar Venkataraman
  • Patent number: 8476142
    Abstract: Aspects of the disclosure pertain to methods of preferentially filling narrow trenches with silicon oxide while not completely filling wider trenches and/or open areas. In embodiments, dielectric layers are deposited by flowing a silicon-containing precursor and ozone into a processing chamber such that a relatively dense first portion of a silicon oxide layer followed by a more porous (and more rapidly etched) second portion of the silicon oxide layer. Narrow trenches are filled with dense material whereas open areas are covered with a layer of dense material and more porous material. Dielectric material in wider trenches may be removed at this point with a wet etch while the dense material in narrow trenches is retained.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: July 2, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Sasha Kweskin, Hiroshi Hamana, Paul Edward Gee, Shankar Venkataraman, Kadar Sapre
  • Publication number: 20120225565
    Abstract: Aspects of the disclosure pertain to methods of depositing conformal silicon oxide multi-layers on patterned substrates. The conformal silicon oxide multi-layers are each formed by depositing multiple sub-layers. Sub-layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS) and an oxygen-containing precursor into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. A plasma treatment may follow formation of sub-layers to further improve conformality and to decrease the wet etch rate of the conformal silicon oxide multi-layer film. The deposition of conformal silicon oxide multi-layers grown according to embodiments have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.
    Type: Application
    Filed: October 3, 2011
    Publication date: September 6, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Sidharth Bhatia, Paul Edward Gee, Shankar Venkataraman
  • Patent number: 8236708
    Abstract: Aspects of the disclosure pertain to methods of depositing dielectric layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS), ozone and molecular oxygen into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: August 7, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Sasha Kweskin, Paul Edward Gee, Shankar Venkataraman, Kedar Sapre
  • Publication number: 20120094468
    Abstract: Aspects of the disclosure pertain to methods of depositing silicon oxide layers on substrates. In embodiments, silicon oxide layers are deposited by flowing a silicon-containing precursor having a Si—O bond, an oxygen-containing precursor and a second silicon-containing precursor, having both a Si—C bond and a Si—N bond, into a semiconductor processing chamber to form a conformal liner layer. Upon completion of the liner layer, a gap fill layer is formed by flowing a silicon-containing precursor having a Si—O bond, an oxygen-containing precursor into the semiconductor processing chamber. The presence of the conformal liner layer improves the ability of the gap fill layer to grow more smoothly, fill trenches and produce a reduced quantity and/or size of voids within the silicon oxide filler material.
    Type: Application
    Filed: July 14, 2011
    Publication date: April 19, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Sidharth Bhatia, Hiroshi Hamana, Paul Edward Gee, Shankar Venkataraman
  • Publication number: 20110250731
    Abstract: Aspects of the disclosure pertain to methods of preferentially filling narrow trenches with silicon oxide while not completely filling wider trenches and/or open areas. In embodiments, dielectric layers are deposited by flowing a silicon-containing precursor and ozone into a processing chamber such that a relatively dense first portion of a silicon oxide layer followed by a more porous (and more rapidly etched) second portion of the silicon oxide layer. Narrow trenches are filled with dense material whereas open areas are covered with a layer of dense material and more porous material. Dielectric material in wider trenches may be removed at this point with a wet etch while the dense material in narrow trenches is retained.
    Type: Application
    Filed: March 21, 2011
    Publication date: October 13, 2011
    Applicant: Applied Materials, Inc.
    Inventors: Sasha Kweskin, Hiroshi Hamana, Paul Edward Gee, Shankar Venkataraman, Kadar Sapre
  • Publication number: 20110223774
    Abstract: Aspects of the disclosure pertain to methods of depositing dielectric layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS), ozone and molecular oxygen into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.
    Type: Application
    Filed: August 13, 2010
    Publication date: September 15, 2011
    Applicant: Applied Materials, Inc.
    Inventors: Sasha Kweskin, Paul Edward Gee, Shankar Venkataraman, Kedar Sapre
  • Patent number: 8012887
    Abstract: Methods of depositing silicon oxide layers on substrates involve flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that a uniform silicon oxide growth rate is achieved across the substrate surface. The surface of silicon oxide layers grown according to embodiments may have a reduced roughness when grown with the additive precursor. In other aspects of the disclosure, silicon oxide layers are deposited on a patterned substrate with trenches on the surface by flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that the trenches are filled with a reduced quantity and/or size of voids within the silicon oxide filler material.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: September 6, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Shankar Venkataraman, Hiroshi Hamana, Manuel A. Hernandez, Nitin K. Ingle, Paul Edward Gee
  • Patent number: 7994019
    Abstract: Aspects of the disclosure pertain to methods of depositing conformal silicon oxide layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing a silicon-containing precursor and ozone into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface having heterogeneous materials and/or a heterogeneous pattern density distribution. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on underlying material and pattern density while still being suitable for non-sacrificial applications. Reduction in dependence on pattern density is achieved by terminating deposition near the end of an incubation period. Multiple deposition cycles may be conducted in series since the beneficial nature of the incubation period may repeat after a pause in deposition.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: August 9, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Sasha Kweskin, Paul Edward Gee, Shankar Venkataraman, Kedar Sapre
  • Publication number: 20100159711
    Abstract: Methods of depositing silicon oxide layers on substrates involve flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that a uniform silicon oxide growth rate is achieved across the substrate surface. The surface of silicon oxide layers grown according to embodiments may have a reduced roughness when grown with the additive precursor. In other aspects of the disclosure, silicon oxide layers are deposited on a patterned substrate with trenches on the surface by flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that the trenches are filled with a reduced quantity and/or size of voids within the silicon oxide filler material.
    Type: Application
    Filed: June 22, 2009
    Publication date: June 24, 2010
    Applicant: Applied Materials, Inc.
    Inventors: Shankar Venkataraman, Hiroshi Hamana, Manuel A. Hernandez, Nitin K. Ingle, Paul Edward Gee
  • Publication number: 20090120364
    Abstract: A gas mixing system for a semiconductor wafer processing chamber is described. The mixing system may include a gas mixing chamber concentrically aligned with a gas transport tube that extends to a blocker plate. The gas mixing chamber and the transport tube are separated by a porous barrier that increases a duration of gas mixing in the gas mixing chamber before processes gases migrate into the transport tube. The system may also include a gas mixing insert having a top section with a first diameter and a second section with a second diameter smaller than the first diameter and concentrically aligned with the top section. The processes gases enter the top section of the insert and follow channels through the second section that cause the gases to mix and swirl in the gas mixing chamber. The second section extends into the gas mixing chamber while still leaving space for the mixing and swirling around the sidewalls and bottom of the mixing chamber.
    Type: Application
    Filed: October 14, 2008
    Publication date: May 14, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Edwin C. Suarez, Karthik Janakiraman, Paul Edward Gee
  • Publication number: 20090031955
    Abstract: Embodiments of a vacuum chuck having an axisymmetrical and/or more uniform thermal profile are provided herein. In some embodiments, a vacuum chuck includes a body having a support surface for supporting a substrate thereupon; a plurality of axisymmetrically arranged grooves formed in the support surface, at least some of the grooves intersecting; and a plurality of chucking holes formed through the body and within the grooves, the chucking holes for fluidly coupling the grooves to a vacuum source during operation, wherein the chucking holes are disposed in non-intersecting portions of the grooves.
    Type: Application
    Filed: July 30, 2007
    Publication date: February 5, 2009
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Siqing Lu, Balaji Chandrasekaran, Paul Edward Gee, Nitin K. Ingle, Dmitry Lubomirsky, Zheng Yuan, Ellie Y. Yieh