Patents by Inventor Paul Hasler

Paul Hasler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060119500
    Abstract: Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.
    Type: Application
    Filed: January 5, 2006
    Publication date: June 8, 2006
    Inventors: Guillermo Serrano, Matthew Kucic, Paul Hasler
  • Publication number: 20060119499
    Abstract: Systems and methods are discussed for using a floating-gate MOSFET as a programmable reference circuit. One example of the programmable reference circuit is a programmable voltage reference source, while a second example of a programmable reference circuit is a programmable reference current source. The programmable voltage reference source and/or the reference current source may be incorporated into several types of circuits, such as comparator circuits, current-mirror circuits, and converter circuits. Comparator circuits and current-mirror circuits are often incorporated into circuits such as converter circuits. Converter circuits include analog-to-digital converters and digital-to-analog converters.
    Type: Application
    Filed: January 5, 2006
    Publication date: June 8, 2006
    Inventors: Philomena Brady, Paul Hasler
  • Publication number: 20050192553
    Abstract: A refastenable pant-like disposable undergarment for absorbing human discharge is disclosed. The undergarment includes a front panel, a back panel, and an absorbent assembly secured therebetween. The front and back panels are joined together to form a waist opening and a pair of leg openings. A pair of tear lines is formed in the front panel with each extending from the waist opening to one of the respective leg openings. A pair of attachment members is secured across the pair of tear lines and one side of the attachment members is removeably fastened to the front panel. The undergarment further includes a pair of ear flaps formed in the front panel under the pair of attachment members. Each ear flap extends to a portion of one of the pair of tear lines and is fixed to one of the attachment members. As the attachment members are opened, the pair of ear flaps will cause the pair of tear lines to break.
    Type: Application
    Filed: March 1, 2004
    Publication date: September 1, 2005
    Inventors: Paul Hasler, Suzanne Schmoker, Jeffery Tabor
  • Publication number: 20050148965
    Abstract: An absorbent garment includes a front body panel having a terminal waist edge and a terminal crotch edge and a rear body panel having a terminal waist edge and a terminal crotch edge. The terminal crotch edge of the rear body panel is longitudinally spaced from and forms a gap with the terminal crotch edge of the front body panel. An absorbent insert includes first and second longitudinally spaced end portions and opposite laterally spaced side edges. The absorbent insert bridges the gap between the front and rear body panels with the first and second end portions overlying and connected to the front and rear body panels respectively. At least one of the first and second end portions of the absorbent insert is connected respectively to a corresponding one of the front and rear body panels with at least first and second adhesive regions having first and second adhesive basis weights respectively.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 7, 2005
    Inventors: Sandra Richlen, Paul Christoffel, Suzanne Schmoker, Paul Hasler, Sarah Freiburger, David Bishop, Melanie Milslagle
  • Patent number: 6898097
    Abstract: In one exemplary embodiment, a programmable analog array (PAA) contains a configurable analog matrix having two floating-gate field effect transistors (FETs). Also contained in the PAA is an interconnect circuit that is programmable to configure the configurable analog matrix to operate in one or more of several matrix modes. A few examples of such matrix modes include a switching matrix mode, a memory matrix mode, and a computing matrix mode. In an exemplary method of configuring the PAA. PAA, the the method includes programming an interconnection, for example, between a first terminal of the first floating-gate FET and a first terminal of the second floating-gate FET. The method further includes programming an interconnection, for example, between a gate terminal of the first floating-gate FET and a fixed voltage source, for setting a floating gate charge on the first floating-gate FET.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: May 24, 2005
    Assignee: Georgia Tech Research Corp.
    Inventors: Jeffery Don Dugger, Tyson S. Hall, Paul Hasler, David V. Anderson, Paul D. Smith, Matthew Raymond Kucic, Abhishek Bandyopadhyay
  • Patent number: 6822522
    Abstract: A nonlinear oscillator method and apparatus. According to one embodiment, a nonlinear oscillator is closed. The nonlinear oscillator includes a first linear amplifier, a second linear amplifier and nonlinear amplifier having a substantially similar design that includes an adjustable linear transconductance region width. The input/output characteristics of the nonlinear oscillator can be represented by van der Pol equations. In another embodiment, a method for providing nonlinear oscillations is disclosed.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: November 23, 2004
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Edgar A. Brown, Joseph D. Neff, Steve P. DeWeerth, Paul Hasler, Brian Keith Meadows
  • Publication number: 20030183871
    Abstract: Systems and methods for configuring a floating-gate transistor device to perform a computational function upon an input signal that is coupled into a floating-gate of the floating gate field-effect transistor, wherein the computational function is dependent upon a charge that is programmed into the floating-gate of the floating-gate field effect transistor. Also provided is a configuration circuit that is used to configure circuit parameters of the floating gate field-effect transistor in order to perform the computational function. In one embodiment, the floating gate transistor, which is a floating-gate pFET, is part of an analog memory array.
    Type: Application
    Filed: March 24, 2003
    Publication date: October 2, 2003
    Inventors: Jeffery Don Dugger, Tyson S. Hall, Paul Hasler, David V. Anderson, Paul D. Smith, Matthew Raymond Kucic, Abhishek Bandyopadhyay