Patents by Inventor Paul Jay Harriman

Paul Jay Harriman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9979294
    Abstract: A DC-DC converter includes an output power stage and a driver circuit. The output stage switches an input voltage to a switch node using a first transistor in response to a top-gate signal received at a top-gate node, and the switch node to ground using a second transistor in response to a bottom-gate signal received at a bottom-gate node. The driver circuit that provides the top- and bottom-gate signals in response to high- and low-side switch signals, respectively, activates the top-gate signal by actively regulating the top-gate node to a first voltage between a threshold voltage and a breakdown voltage of the first transistor using charge from the bottom-gate node, and activates the bottom-gate signal by actively regulating a second voltage provided to the bottom-gate node between a threshold voltage and a breakdown voltage of the second transistor using charge from the top-gate node.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 22, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Paul Jay Harriman, Andrea Bonelli, Dominique Romeo
  • Patent number: 9733283
    Abstract: A method for estimating load current in a DC-DC converter, in some embodiments, comprises: identifying a converter capacitor in parallel with a converter load in a DC-DC converter; providing an estimation capacitor based on a capacitance of the converter capacitor; providing said estimation capacitor with an estimation capacitor current based on an inductor current flowing through an inductor in the DC-DC converter; driving an estimation voltage across the estimation capacitor toward a voltage present across the converter capacitor; and using the estimation voltage to generate an estimation current that estimates a load current passing through said converter load.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: August 15, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Paul Jay Harriman
  • Publication number: 20160315536
    Abstract: A method for estimating load current in a DC-DC converter, in some embodiments, comprises: identifying a converter capacitor in parallel with a converter load in a DC-DC converter; providing an estimation capacitor based on a capacitance of the converter capacitor; providing said estimation capacitor with an estimation capacitor current based on an inductor current flowing through an inductor in the DC-DC converter; driving an estimation voltage across the estimation capacitor toward a voltage present across the converter capacitor; and using the estimation voltage to generate an estimation current that estimates a load current passing through said converter load.
    Type: Application
    Filed: April 23, 2015
    Publication date: October 27, 2016
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Paul Jay HARRIMAN
  • Patent number: 8710821
    Abstract: A method for mitigating aliasing effects in a single phase power converter and mitigating aliasing effects and inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A single phase or multi-phase power converter having an on-time is provided and the frequency of the power converter is adjusted so that a load step period and the on time of the single phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: April 29, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Ole P. Moyer, Paul Jay Harriman, Benjamin M. Rice, Christopher J. Gass, Michael A. Stapleton
  • Publication number: 20100327827
    Abstract: A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.
    Type: Application
    Filed: July 19, 2010
    Publication date: December 30, 2010
    Inventors: Ole P. Moyer, Paul Jay Harriman, Benjamin M. Rice, Christopher J. Gass, Michael A. Stapleton
  • Publication number: 20100277961
    Abstract: A method for mitigating aliasing effects in a single phase power converter and mitigating aliasing effects and inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A single phase or multi-phase power converter having an on-time is provided and the frequency of the power converter is adjusted so that a load step period and the on time of the single phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.
    Type: Application
    Filed: July 15, 2010
    Publication date: November 4, 2010
    Inventors: OLE P. MOYER, Paul Jay Harriman, Benjamin M. Rice, Christopher J. Gass, Michael A. Stapleton