Patents by Inventor Paul Joseph Maria BEERENS

Paul Joseph Maria BEERENS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9516720
    Abstract: The invention describes a surge-protection arrangement (1) for an electronic device (3) comprising a heat-dissipating load (10) thermally connected to a heat sink (107) of the load (10), which surge protection arrangement (1) comprises at least one high impedance arrangement (ZHI, ZHI_N, ZHI_P) connected in series with the load (10); at least one low impedance arrangement (ZLO, ZLO_N, ZLO_P) connected in parallel with the load (10); and a ground connection (FE) arranged to electrically connect the heat sink (107) and a low impedance arrangement (ZLO, ZLO_N, ZLO_P); wherein the high-impedance arrangement (ZHI, ZHI_N, ZH_IP) is realized to discourage a common-mode surge current (Is) from entering the load (10), and the low-impedance arrangement (ZLO, ZLO_N, ZLO_P) is realized to encourage a common-mode surge current (Is) to bypass the load (10) into a ground connection (FE).
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: December 6, 2016
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Dmytro Viktorovych Malyna, Eugen Jacob De Mol, Paul Joseph Maria Beerens
  • Publication number: 20160270161
    Abstract: The invention describes a surge-protection arrangement (1) for an electronic device (3) comprising a heat-dissipating load (10) thermally connected to a heat sink (107) of the load (10), which surge protection arrangement (1) comprises at least one high impedance arrangement (ZHI, ZHI_N, ZHI_P) connected in series with the load (10); at least one low impedance arrangement (ZLO, ZLO_N, ZLO_P) connected in parallel with the load (10); and a ground connection (FE) arranged to electrically connect the heat sink (107) and a low impedance arrangement (ZLO, ZLO_N, ZLO_P); wherein the high-impedance arrangement (ZHI, ZHI_N, ZHI_P) is realized to discourage a common-mode surge current (IS) from entering the load (10), and the low-impedance arrangement (ZLO, ZLO_N, ZLO—P) is realized to encourage a common-mode surge current (IS) to bypass the load (10) into a ground connection (FE).
    Type: Application
    Filed: November 4, 2014
    Publication date: September 15, 2016
    Inventors: Dmytro Viktorovych MALYNA, Eugen Jacob DE MOL, Paul Joseph Maria BEERENS