Abstract: A wearable garment and an arrangement of electrodes configured to measure bioelectrical signals from a patient. The dry electrodes are free from adhesives to hold the electrodes in place on the patient's skin. The arrangement of the electrodes may be configured to limit noise and facilitate accurate signal sensing from the patient even with some amount of relative movement between the electrodes and the patient's skin. The wearable garment may be controllable to change the amount of compression based on the sensed signals from the electrodes, and from other sensors. The garment may maintain a comfortable level of compression until processing circuitry detects a signal of interest, such as a cardiac arrhythmia, irregular respiration, or some other signal. The processing circuitry may cause the wearable garment to increase compression to improve the contact between the electrodes and the patient's skin and improve reception of the measured signals.

Abstract: A transmitter device includes a configurable timer circuit that adjusts timing of input data for serial transmission of the input data. The configurable timer circuit may be configured depending on the configured data rate of the transmitter device. In one embodiment, the configurable timer circuit includes a plurality of configurable retimers that retime the input data where at least a portion of one of the plurality of configurable retimers is enabled based on the configured data rate.

Abstract: A transmitter device includes a configurable timer circuit that adjusts timing of input data for serial transmission of the input data. The configurable timer circuit may be configured depending on the configured data rate of the transmitter device. In one embodiment, the configurable timer circuit includes a plurality of configurable retimers that retime the input data where at least a portion of one of the plurality of configurable retimers is enabled based on the configured data rate.

Abstract: A transmitter device having a calibrator circuit is disclosed. The calibrator circuit performs duty cycle calibration and phase calibration on a plurality of clock signals of the transmitter device. In one embodiment, the phase calibration is performed based on a comparison of the clock signals to a reference clock signal from the plurality of clock signals. In another embodiment, the calibrator circuit uses fixed patterns of data signals to perform phase calibration on the plurality of clock signals.

Abstract: Injecting pad bits during a read operation to improve format efficiency is disclosed. In some embodiments, a pad sequence associated with error correction is not stored in a sector on a disk. Instead, the pad sequence is merged at a read channel with data stored in a sector that is accessed by the read channel.

Abstract: A method of obtaining a Viterbi decoded value is disclosed. A decision output is stored to one of a plurality of buffer elements, wherein at least one other buffer element in the plurality is not changing; and data is exposed in the buffer element. A plurality of stored decision outputs is obtained from the plurality of buffers elements. The obtained plurality of stored decision outputs is processed to obtain a Viterbi decoded value.

Abstract: Injecting pad bits during a read operation to improve format efficiency is disclosed. In some embodiments, a pad sequence associated with error correction is not stored in a sector on a disk. Instead, the pad sequence is merged at a read channel with data stored in a sector that is accessed by the read channel.

Abstract: Injecting pad bits during a read operation to improve format efficiency is disclosed. In some embodiments, a pad sequence associated with error correction is not stored in a sector on a disk. Instead, the pad sequence is merged at a read channel with data stored in a sector that is accessed by the read channel.

Abstract: A novel bridge type optoelectronic (OE) sample and hold circuit based upon current steering demonstrates a clear superiority in performance with respect to a direct OE sample and hold circuit. The bridge type OE sample and hold circuit permits a high-speed signal to be sampled with high accuracy to offer high charging capability, commanding signal isolation, reduced time jitter and reduced holding charge leakage which are distinct advantages over conventional electronic sample and hold circuits.