Patents by Inventor Paul Kuepper

Paul Kuepper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8487307
    Abstract: A semiconductor arrangement is disclosed. One embodiment includes a first semiconductor layer including a first and second component zone that form a pn-junction or a Schottky-junction. A second semiconductor layer includes a drift control zone adjacent to the second component zone. A dielectric layer separates the first semiconductor layer from the second semiconductor layer. A rectifying element is coupled between the drift control zone and the second component zone.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: July 16, 2013
    Assignee: Infineon Technologies Austria AG
    Inventors: Joachim Weyers, Anton Mauder, Franz Hirler, Paul Kuepper
  • Publication number: 20120091457
    Abstract: A semiconductor arrangement is disclosed. One embodiment includes a first semiconductor layer including a first and second component zone that form a pn-junction or a Schottky-junction. A second semiconductor layer includes a drift control zone adjacent to the second component zone. A dielectric layer separates the first semiconductor layer from the second semiconductor layer. A rectifying element is coupled between the drift control zone and the second component zone.
    Type: Application
    Filed: December 21, 2011
    Publication date: April 19, 2012
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Joachim Weyers, Anton Mauder, Franz Hirler, Paul Kuepper
  • Patent number: 8097880
    Abstract: A semiconductor component including a lateral transistor component is disclosed. One embodiment provides an electrically insulating carrier layer. A first and a second semiconductor layer are arranged on above another and are separated from another by a dielectric layer. The first semiconductor layer includes a polycrystalline semiconductor material, an amorphous semiconductor material or an organic semiconductor material. In the first semiconductor layer: a source zone, a body zone, a drift zone and a drain zone are provided. In the second semiconductor layer; a drift control zone is arranged adjacent to the drift zone, including a control terminal at a first lateral end for applying a control potential, and is coupled to the drain zone via a rectifying element at a second lateral end. A gate electrode is arranged adjacent to the body zone and is dielectrically insulated from the body zone by a gate dielectric layer.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: January 17, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Joachim Weyers, Anton Mauder, Franz Hirler, Paul Kuepper
  • Patent number: 7833886
    Abstract: A method of producing a semiconductor element in a substrate includes forming a plurality of micro-cavities in a substrate, creating an amorphization of the substrate to form crystallographic defects and a doping of the substrate with doping atoms, depositing an amorphous layer on top of the substrate, and annealing the substrate, such that at least a part of the crystallographic defects is eliminated using the micro-cavities. The semiconductor element is formed using the doping atoms.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: November 16, 2010
    Assignees: Infineon Technologies AG, Qimonda AG
    Inventors: Luis-Felipe Giles, Matthias Goldbach, Martin Bartels, Paul Kuepper
  • Publication number: 20100258801
    Abstract: A semiconductor component including a lateral transistor component is disclosed. One embodiment provides an electrically insulating carrier layer. On the carrier layer a first and a second semiconductor layer are arranged on above another and are separated from another by a dielectric layer and from which at least the first semiconductor layer includes a polycrystalline semiconductor material, an amorphous semiconductor material or an organic semiconductor material. In the first semiconductor layer: a source zone, a body zone, a drift zone and a drain zone are provided. In the second semiconductor layer; a drift control zone is arranged adjacent to the drift zone, including a control terminal at a first lateral end for applying a control potential, and is coupled to the drain zone via a rectifying element at a second lateral end. A gate electrode is arranged adjacent to the body zone and is dielectrically insulated from the body zone by a gate dielectric layer.
    Type: Application
    Filed: April 9, 2009
    Publication date: October 14, 2010
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Joachim Weyers, Anton Mauder, Franz Hirler, Paul Kuepper
  • Publication number: 20080286908
    Abstract: A method of producing a semiconductor element in a substrate includes forming a plurality of micro-cavities in a substrate, creating an amorphization of the substrate to form crystallographic defects and a doping of the substrate with doping atoms, depositing an amorphous layer on top of the substrate, and annealing the substrate, such that at least a part of the crystallographic defects is eliminated using the micro-cavities. The semiconductor element is formed using the doping atoms.
    Type: Application
    Filed: May 14, 2007
    Publication date: November 20, 2008
    Inventors: Luis-Felipe Giles, Matthias Goldbach, Martin Bartels, Paul Kuepper