Abstract: A system and method for monitoring gastric acid reflux in a patient are described. A system constructed in accordance with the present invention comprises a combination probe including a flexible tube having a pH probe disposed distally and a pressure sensor disposed a known distance proximally, the pH probe for generating pH signals in response to a hydrogen ion concentration, and the pressure sensor for generating pressure signals in response to phasic pressure changes; a display for displaying the pressure signals to aid the positioning of the probe at the LES; and a memory for storing the pH signals. A method of the present invention comprises placing the combination pH/pressure probe in the patient's stomach then withdrawing the probe until the LES respiration phasic pressure is observed from the display. Next, the probe is withdraw a known distance. This positions the pH probe at a specified distance above the LES where reflux may be monitored.

Abstract: A signal conditioning circuit includes a logarithmic signal compression circuit for compressing wide dynamic range input signals to a dynamic range which is a predetermined portion of the dynamic range of an output utilization apparatus. There is provided, additionally, means for detecting the presence of the high level signals and superimposing a signal representative of the high level signals on the compressed signals to provide a combined output signal which, while compressed to the range of the output utilization apparatus, contains definable low level and high level signals from a wide dynamic range input signal.

Abstract: A capacitive integrator passes a current through a non-linearity compensating transistor, a thermistor, and an analog output amplifier and resistor so that the value of the current and the value of the voltage across the resistor are proportional to the thermistor temperature. A comparator detects each passage of the integrator output voltage above zero, and causes the output of a flip-flop to go high upon such passage for a fixed time period during which an opposing current is passed through the integrator capacitor to drive the integrator output voltage below zero. The resulting pulses in the flip-flop output are counted by a presettable counter for a predetermined counting period to give a count which is proportional to the thermistor current and temperature. This count is decimally displayed and is made numerically equal to the thermistor temperature according to any desired temperature scale by suitably selecting the length of the counting period and the preset count of the counter.