Patents by Inventor Paul Rissman

Paul Rissman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8082524
    Abstract: A method for determining mask patterns to be used on photo-masks in a multiple-exposure photolithographic process is described. During the method, an initial mask pattern, which is intended for use in a single-exposure photolithographic process, and a target pattern that is to be printed are used to determine a first mask pattern and a second mask pattern, which are intended for use in the multiple-exposure photolithographic process. In particular, the first mask pattern includes a first feature and the second mask pattern includes a second feature, and the first feature and the second feature overlap an intersection between features in the initial mask pattern. Moreover, the first mask pattern and the second mask pattern have at least one decreased spatial frequency relative to the initial mask pattern along at least one direction in the initial mask pattern.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: December 20, 2011
    Assignee: Luminescent Technologies, Inc.
    Inventors: Robert P. Gleason, Timothy Lin, Andrew J. Moore, Bennett W. Olson, Paul Rissman
  • Patent number: 7793253
    Abstract: A method for determining a mask pattern to be used on a photo-mask in a photolithographic process is described. During the method, a target pattern that includes at least one continuous feature is provided. Then a mask pattern that includes a plurality of distinct types of regions corresponding to the distinct types of regions of the photo-mask is determined. Note that the mask pattern includes at least two separate features corresponding to at least the one continuous feature. Furthermore, at least the two separate features are separated by a spacing having a length and the spacing overlaps at least a portion of at least the one continuous feature.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: September 7, 2010
    Assignee: Luminescent Technologies, Inc.
    Inventors: Daniel S. Abrams, Danping Peng, Yong Liu, Paul Rissman
  • Publication number: 20090319978
    Abstract: A method for determining mask patterns to be used on photo-masks in a multiple-exposure photolithographic process is described. During the method, an initial mask pattern, which is intended for use in a single-exposure photolithographic process, and a target pattern that is to be printed are used to determine a first mask pattern and a second mask pattern, which are intended for use in the multiple-exposure photolithographic process. In particular, the first mask pattern includes a first feature and the second mask pattern includes a second feature, and the first feature and the second feature overlap an intersection between features in the initial mask pattern. Moreover, the first mask pattern and the second mask pattern have at least one decreased spatial frequency relative to the initial mask pattern along at least one direction in the initial mask pattern.
    Type: Application
    Filed: April 14, 2009
    Publication date: December 24, 2009
    Inventors: Robert P. Gleason, Timothy Lin, Andrew J. Moore, Bennett W. Olson, Paul Rissman
  • Publication number: 20070196742
    Abstract: A method for determining a mask pattern to be used on a photo-mask in a photolithographic process is described. During the method, a target pattern that includes at least one continuous feature is provided. Then a mask pattern that includes a plurality of distinct types of regions corresponding to the distinct types of regions of the photo-mask is determined. Note that the mask pattern includes at least two separate features corresponding to at least the one continuous feature. Furthermore, at least the two separate features are separated by a spacing having a length and the spacing overlaps at least a portion of at least the one continuous feature.
    Type: Application
    Filed: October 4, 2006
    Publication date: August 23, 2007
    Inventors: Daniel Abrams, Danping Peng, Yong Liu, Paul Rissman
  • Patent number: 6986972
    Abstract: Embodiments of the invention include a method for forming alternating aperture phase-shift masks. An optically transparent substrate suitable for having a pattern of phase-shift regions formed thereon is provided. Alternatively, an opaque pattern is formed on the optically transparent substrate, the opaque pattern defining a pattern of phase-shift regions on the substrate. The phase shift regions are then ion implanted to damage the phase-shift regions. The damage penetrates to a predetermined depth and forms damaged regions that can be more easily etched than the adjacent undamaged portions of the substrate. The damaged portions define a final profile for phase shift recesses to be formed in the substrate. After implantation, substrate material is removed from the damaged phase-shift regions so that recesses are formed therein. The recesses are formed having a depth that corresponds to the depth of the damage caused in the phase-shift regions by the ion implantation.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: January 17, 2006
    Assignee: LSI Logic Corporation
    Inventor: Paul Rissman
  • Publication number: 20040241554
    Abstract: The mask includes a substrate formed of a material having a first index of refraction and a first level of transmittance to a wavelength of light with which the phase shift mask is designed for use. Second portions of the substrate are impregnated with a dopant species, leaving first portions of the substrate unaffected by the dopant species. The second portions of the substrate have a second index of refraction and a second level of transmittance to the wavelength of light. The first index of refraction is not equal to the second index of refraction. The second portions of the substrate shift a phase of the light relative to the first portions of the substrate and thereby increase an effective imaging resolution of the phase shift mask. In this manner, instead of using an etch process or a deposition process to form phase shifting regions of the mask, a doping processing is used instead. Most preferably, an ion implantation process is used.
    Type: Application
    Filed: May 29, 2003
    Publication date: December 2, 2004
    Applicant: LSI Logic Corporation, Milpitas, CA
    Inventors: Paul Rissman, Nicholas K. Eib, Charles E. May
  • Patent number: 6747358
    Abstract: Embodiments of the invention include a capping layer of alloy material formed over a copper-containing layer, the alloy configured to prevent diffusion of copper through the capping layer. In another embodiment the alloy capping layer is self-aligned to the underlying conducting layer. Specific embodiments include capping layers formed of alloys of copper with materials including but not limited to calcium, strontium, barium, and other alkaline earth metals, as well as materials from other groups, for example, cadmium or selenium. The invention also includes methods for forming an alloy capping layer on a copper-containing conducting structure. One such method includes providing a substrate having formed thereon electrically conducting layer comprised of a copper-containing material and forming an alloy capping layer on the electrically conducting layer. In another method embodiment, forming the alloy capping layer includes forming a self-aligned capping layer over the conducting layer.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: June 8, 2004
    Assignee: LSI Logic Corporation
    Inventors: Paul Rissman, Richard Schinella, Sheldon Aronowitz, Vladimir Zubkov
  • Patent number: 6566262
    Abstract: Embodiments of the invention include a capping layer of alloy material formed over a copper-containing layer, the alloy configured to prevent diffusion of copper through the capping layer. In another embodiment the alloy capping layer is self-aligned to the underlying conducting layer. Specific embodiments include capping layers formed of alloys of copper with materials including but not limited to calcium, strontium, barium, and other alkaline earth metals, as well as materials from other groups, for example, cadmium or selenium. The invention also includes methods for forming an alloy capping layer on a copper-containing conducting structure. One such method includes providing a substrate having formed thereon electrically conducting layer comprised of a copper-containing material and forming an alloy capping layer on the electrically conducting layer. In another method embodiment, forming the alloy capping layer includes forming a self-aligned capping layer over the conducting layer.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: May 20, 2003
    Assignee: LSI Logic Corporation
    Inventors: Paul Rissman, Richard Schinella, Sheldon Aronowitz, Vladimir Zubkov
  • Patent number: 6552743
    Abstract: A system and method utilize a digital camera-ready printer which can print directly from a variety of conventional digital cameras on the market. The digital camera-ready printer includes a camera interface that can link with a digital camera in different modes to transfer frames of digital image data from the digital cameras to the digital camera-ready printer. Preferably, the camera interface includes a hot shoe receptor to establish a convenient hot shoe link between the digital camera and the digital camera-ready printer. The digital camera-ready printer includes a processor that can identify the coupled digital camera in order to instruct the digital camera to transmit the frames of digital image data. The processor can also convert the format of the digital image data to a predetermined image file format.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: April 22, 2003
    Assignee: Hewlett Packard Development Company, L.P.
    Inventor: Paul Rissman
  • Patent number: 5661043
    Abstract: A method and apparatus for forming a buried insulator layer, typically a silicon dioxide layer, includes using plasma source ion implantation to uniformly implant ions into exposed regions of a semiconductor wafer. A silicon-on-insulator (SOI) structure is formed by an anneal step before fabricating an integrated circuit into the thin semiconductor layer above the buried insulator layer.
    Type: Grant
    Filed: July 25, 1994
    Date of Patent: August 26, 1997
    Inventors: Paul Rissman, James B. Kruger, J. Leon Shohet
  • Patent number: 4463265
    Abstract: In electron beam lithography, a beam of incident electrons exposes a preselected circuit pattern in a thin resist layer deposited on top of a substrate to be etched. Some of the electrons scatter from the substrate back into the resist layer producing an undesired exposure which produces variable resolution of features. In accordance with the disclosed technique, the region of the resist which is complementary to the desired circuit pattern is also exposed by an electron beam which has been adjusted to produce an exposure approximating that due to backscattering. This additional exposure removes the spatial variability in resolution attainable by the electron beam lithography.
    Type: Grant
    Filed: June 17, 1982
    Date of Patent: July 31, 1984
    Assignee: Hewlett-Packard Company
    Inventors: Geraint Owen, Paul Rissman