Abstract: An analog to digital converter device including: an input to receive a radio frequency (RF) signal; a plurality of delay elements coupled in series to the input, wherein each element has an output configured to provide the RF signal with a temporal delay corresponding to a different number of the delay elements; a sample rate reduction system having a plurality of inputs each being coupled to a corresponding one of the delay element outputs, and configured to sample the delayed RF signals and provide M-sample outputs, each of the M-sample outputs being sampled at a reduced sampling rate equal to the sampling rate divided by M, M being an integer sample rate reduction value; and an Nth order complex bandpass filter coupled to the sample rate reduction system, the complex bandpass filter being configured to filter each of the M-sample outputs to obtain a plurality of complex baseband signals.

Abstract: An analog to digital converter device including: an input to receive a radio frequency (RF) signal; a plurality of delay elements coupled in series to the input, wherein each element has an output configured to provide the RF signal with a temporal delay corresponding to a different number of the delay elements; a sample rate reduction system having a plurality of inputs each being coupled to a corresponding one of the delay element outputs, and configured to sample the delayed RF signals and provide M-sample outputs, each of the M-sample outputs being sampled at a reduced sampling rate equal to the sampling rate divided by M, M being an integer sample rate reduction value; and an Nth order complex bandpass filter coupled to the sample rate reduction system, the complex bandpass filter being configured to filter each of the M-sample outputs to obtain a plurality of complex baseband signals.

Abstract: An electronic overcurrent circuit interrupter utilizes a digital processor for performing RMS sampling of circuit current for comparison to stored long time and short time current values and time delays before tripping the breaker. A magnetic core current transformer is employed for providing an output current signal to the digital processor. Upon detecting core saturation, which occurs at high currents, an analog detection circuit interrupts the RMS sampling and causes the digital processor to time out the shortest pre-selected time delay before tripping the breaker.