Abstract: A “dry” packaging in which a prosthetic heart valve is packaged within a container with hydrogel that can be provided in many forms. Certain embodiments include hydrogel that is preloaded with glycerol or the like. The hydrogel regulates the humidity within the container through a diffusion-driven mechanism if a gradient of humidity between the inside and the outside of the hydrogel exists. Humidity regulation is important to prevent the tissue of the valve structure from drying out. When the partially-hydrated hydrogel is present within container, which is saturated with air of a predefined humidity, the water molecules from the air will be absorbed by the hydrogel if the air humidity is high (i.e. when the thermodynamics favor hydrogel hydration) or vice versa. Various embodiments are configured to also house at least a portion of a delivery device for delivering the prosthetic heart valve.

Abstract: A storage apparatus and method configured to improve efficiency of data access utilizing dynamically adjusting storage zone boundary within a disk are disclosed. A process capable of implementing the flexible zone boundary, in one example, allocates a first zone of a first disk operable to store data. While the first zone can be referred to as a Redundant Array of Independent Disks 0 (“RAID 0”) zone, the implementation of RAID 0 can be carried out in the first zone. Upon allocating a second zone of the first disk operable to store secured data, the process allocates a third zone of the first disk wherein the storage boundary of the first zone can be dynamically expanded into the third zone in response to the availability of free storage capacity of the first zone of the first disk.

Abstract: A storage apparatus and method configured to improve efficiency of data access utilizing dynamically adjusting storage zone boundary within a disk are disclosed. A process capable of implementing the flexible zone boundary, in one example, allocates a first zone of a first disk operable to store data. While the first zone can be referred to as a Redundant Array of Independent Disks 0 (“RAID 0”) zone, the implementation of RAID 0 can be carried out in the first zone. Upon allocating a second zone of the first disk operable to store secured data, the process allocates a third zone of the first disk wherein the storage boundary of the first zone can be dynamically expanded into the third zone in response to the availability of free storage capacity of the first zone of the first disk.

Abstract: The present invention relates to RAID arrays with one or more dedicated parity disks. In particular, it relates to expandable RAID arrays. An expansion disk can be added to a RAID array without the need of redistributing striped data among disks.

Abstract: A semiconductor device with an embedded PCI 2.1 compliant bridge provides expanded functionality as system-level implementations of a PCI-to-PCI bridge, and enhances the level of integration possible. The embedded PCI-to-PCI bridge allows the creation of multi-function, multimedia add-on cards supporting multiple devices. Multi-function, multimedia subsystems that provide audio, graphics, MPEG, etc., are mapped into a bridged-to PCI-bus that keeps such traffic off the main PCI-bus. The advantage for the system or add-in card vendor is that the various multimedia chips that are combined can come from different sources, providing an optimized and highly customized combination of functions.

Abstract: A transparent direct memory access method comprises emulating an ISA-bus mapped direct memory access controller (ISA-DMAC) with a PCI-bus mapped direct memory access controller (PCI-DMAC). The ISA-DMAC exists, but there may not actually be any resources mapped into the ISA-bus space. Write snooping by the PCI-DMAC of a PCI-bus processor detects whenever an attempt is made to write the ISA-DMAC, and copies the data written into the ISA-DMAC registers into a corresponding register of the PCI-DMAC. The direct memory access operation commanded by the PCI-bus processor of the ISA-DMAC is performed by the PCI-DMAC in the PCI-bus resource space. When the direct memory access operation is completed, the PCI-DMAC updates its registers and does a write back to update the ISA-DMAC registers. The PCI-bus processor can then read the PCI-DMAC directly for status, or if legacy software is running the ISA-DMAC will respond with the appropriate register value.