Abstract: Embodiments of the present invention include an integrated circuit comprising an integrated transmission line, wherein the integrated transmission line is used as a timing reference for a feedback loop and wherein the feedback loop and the transmission line are integrated on a single integrated circuit. The feedback loop and transmission line may be used as a frequency generator or controlled delay, for example. In another embodiment, the present invention includes a timing loop with first and second commutating phase detectors.

Abstract: Embodiments of the present invention reduce static phase offset in timing loops. In one embodiment, the present invention includes a timing loop comprising first and second phase detectors, wherein during a first time period, the first phase detector is coupled in a closed timing loop and the second phase detector is decoupled from the closed timing loop and calibrated, and during a second time period, the second phase detector is coupled in a closed timing loop and the first phase detector is decoupled from the closed timing loop and calibrated.

Abstract: Embodiments of the present invention include a frequency generator comprising a feedback loop with a transmission line integrated on a single integrated circuit. In one embodiment, a frequency generator comprises a phase detector and a voltage controlled oscillator coupled in series, and a transmission line having an input coupled to an output of the voltage controlled oscillator, the transmission line providing a time delay between the transmission line input and output, wherein the phase detector includes an input coupled to the transmission line output and another input coupled to the transmission line input. The phase detector, voltage controlled oscillator and transmission line are advantageously integrated on a single integrated circuit.