Patents by Inventor Pawan Garg

Pawan Garg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230362541
    Abstract: A method for designing a loudspeaker excursion estimator comprises measuring an excursion-related parameter for a loudspeaker, for each of a plurality of loudspeaker input signal levels and each of a plurality of loudspeaker input signal frequencies. The method further comprises, for each of the loudspeaker input signal frequencies and based on the measured excursion-related parameters, identifying a respective loudspeaker input signal level corresponding to a target maximum excursion-related parameter value. The method further comprises determining a filter response, based on the identified loudspeaker input signal levels and their respective loudspeaker input signal frequencies, and implementing a filter, based on the calculated filter response, for generating an excursion estimation based on loudspeaker input signal levels.
    Type: Application
    Filed: May 3, 2022
    Publication date: November 9, 2023
    Inventors: Thomas Holm Hansen, Pawan Garg, Jun Honda, Niels Petersen
  • Patent number: 10855166
    Abstract: A controller circuit for a switch-mode power supply (SMPS). The controller circuit is configured to generate, with a plurality of phases, a combined output current at a supply node to supply a load, determine a ripple shaping current complimentary to an estimated ripple at the combined output current using a number of active phases of the plurality of phases that generate the combined output current, and generate, with an auxiliary phase, the ripple shaping current at the supply node to reduce ripple occurring at the combined output current.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: December 1, 2020
    Assignee: Infineon Technologies AG
    Inventors: Pawan Garg, Stefan Schumi
  • Patent number: 10784183
    Abstract: A semiconductor package includes a semiconductor module, a first package extension frame, a second package extension frame, and a plurality of fasteners. The semiconductor module includes a first side surface, a second side surface, a first major surface, and a second major surface on an opposite side of the semiconductor module from the first major surface. The first package extension frame is configured to attach to the first side surface. The second package extension frame is configured to attach to the second side surface. The plurality of fasteners are configured to mechanically couple the first package extension frame and the second package extension frame to one or more of a circuit board arranged on the first major surface and/or a heat sink arranged on the second major surface.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: September 22, 2020
    Assignee: Infineon Technologies AG
    Inventors: Pawan Garg, Mathias Kiele-Dunsche, Tomas Manuel Reiter, Christopher Roemmelmayer
  • Publication number: 20200295651
    Abstract: A controller circuit for a switch-mode power supply (SMPS). The controller circuit is configured to generate, with a plurality of phases, a combined output current at a supply node to supply a load, determine a ripple shaping current complimentary to an estimated ripple at the combined output current using a number of active phases of the plurality of phases that generate the combined output current, and generate, with an auxiliary phase, the ripple shaping current at the supply node to reduce ripple occurring at the combined output current.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 17, 2020
    Inventors: Pawan Garg, Stefan Schumi
  • Publication number: 20200176351
    Abstract: A semiconductor package includes a semiconductor module, a first package extension frame, a second package extension frame, and a plurality of fasteners. The semiconductor module includes a first side surface, a second side surface, a first major surface, and a second major surface on an opposite side of the semiconductor module from the first major surface. The first package extension frame is configured to attach to the first side surface. The second package extension frame is configured to attach to the second side surface. The plurality of fasteners are configured to mechanically couple the first package extension frame and the second package extension frame to one or more of a circuit board arranged on the first major surface and/or a heat sink arranged on the second major surface.
    Type: Application
    Filed: November 30, 2018
    Publication date: June 4, 2020
    Inventors: Pawan Garg, Mathias Kiele-Dunsche, Tomas Manuel Reiter, Christopher Roemmelmayer