Abstract: A highly innovative new technique of developing DC to AC power sources for various applications has been described. Such technique of generating AC power is different from the conventional techniques and this new technology has been called the Solid State Power Supply (SSPS) Technology. The principle of operation depends upon high frequency switching using MOSFET bridge inverter which utilizes charge-discharge averaging principle to generate the sinusoidal AC voltage. The use of fast turn-on power MOSFETs enables the application of high frequency switching on this power technology. While the non-isolated SSPS is claimed to be transformerless, the isolated SSPS requires the use of a high frequency transformer for input-output isolation and for changing the output voltage level. The output filtering is reduced tremendously, thereby reducing the size of such power supplies.

Abstract: A highly innovative new technique of developing AC to DC power sources for various applications has been described. Such technique of generating DC power is different from the conventional linear and switching power conversion techniques and this new technology has been called the Solid State Power Supply (SSPS) Technology. The principle of operation depends upon high-frequency pulsed power switching followed by high energy charge-discharge principles as applied to power conversion technology. The use of fast turn-on power MOSFETs enables the application of high frequency switching on this power technology. While the non-isolated SSPS is claimed to be transformerless, the isolated SSPS requires the use of a transformer for input-output isolation. The input and output filtering is reduced tremendously, thereby reducing the size of such power supplies.

Abstract: An automated sequential test system, designed to compare analog test signals, derived from plurality of test nodes, located on the circuit under test with the corresponding reference signals, derived from plurality of similar nodes, located on a pre-tested good reference circuit, is described. The test system generates `pass signals` for such test nodes, the signal levels compared to lie between the pre-assigned positive and negative tolerance limits of the signal levels on the corresponding reference nodes. Otherwise, the system exhibits a fail signal, digital display count of the node number and polarity of failure from the reference signal in its tolerance band for such nodes which do not pass the test limit.