Abstract: A system and method are provided for calibrating an interleaved digital-to-analog converter (DAC). Sets of sub-DACs are enabled, and by creating a high frequency fundamental signal, spurs can be driven down sufficiently low in frequency to be sampled and digitally converted. By minimizing the power of these digital signals, the duty cycles of the different clock phases are calibrated. Then, sets of sub-DACs are enabled and high pass filtered, so that the spurs can be downconverted using corresponding phases of the clock, to a frequency low enough to sampled and digitally converted. The power of the digital signals is minimized as a first step in phase calibration. As a final step, all the sub-DACs are enabled, the high pass filter removed, and a high frequency fundamental signal is downconverted using at least two clock phases, so that the phase difference can be measured and corrected.

Abstract: The present disclosure relates to a front-end system for a radio device comprising: a charge generator circuit arranged for receiving a digital baseband signal, a first converter circuit arranged for calculating at least one charge value based on the digital baseband signal, a second converter circuit arranged for converting the at least one charge value into at least one electrical charge, and a modulator circuit arranged for generating a radio frequency signal based on the at least one electrical charge and at least one local oscillator signal.

Abstract: The present disclosure relates to a front-end system for a radio device comprising: a charge generator circuit arranged for receiving a digital baseband signal, a first converter circuit arranged for calculating at least one charge value based on the digital baseband signal, a second converter circuit arranged for converting the at least one charge value into at least one electrical charge, and a modulator circuit arranged for generating a radio frequency signal based on the at least one electrical charge and at least one local oscillator signal.