Patents by Inventor Pei-Jih Wang

Pei-Jih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770864
    Abstract: A surface emitting laser includes a conductive substrate, a metal bonding layer, a laser structure layer, an epitaxial semiconductor reflection layer, and an electrode layer. The laser structure layer has an epitaxial current-blocking layer having a current opening. Currents are transmitting through the current opening. The epitaxial current-blocking layer is grown by a semiconductor epitaxy process to confine the range of the currents to form electric fields.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: September 8, 2020
    Assignee: TREND LIGHTING CORP.
    Inventors: Jonathan Wang, Pei-Chin Hsieh, Pei-Jih Wang, Shih-Chieh Cheng
  • Publication number: 20190237937
    Abstract: A surface emitting laser includes a conductive substrate, a metal bonding layer, a laser structure layer, an epitaxial semiconductor reflection layer, and an electrode layer. The laser structure layer has an epitaxial current-blocking layer having a current opening. Currents are transmitting through the current opening. The epitaxial current-blocking layer is grown by a semiconductor epitaxy process to confine the range of the currents to form electric fields.
    Type: Application
    Filed: April 11, 2019
    Publication date: August 1, 2019
    Inventors: Jonathan WANG, Pei-Chin HSIEH, Pei-Jih WANG, Shih-Chieh CHENG
  • Patent number: 10305255
    Abstract: A surface emitting laser includes a conductive substrate, a metal bonding layer, a laser structure layer, an epitaxial semiconductor reflection layer, and an electrode layer. The laser structure layer has an epitaxial current-blocking layer having a current opening. Currents are only transmitting through the current opening. The epitaxial current-blocking layer is grown by a semiconductor epitaxy process to confine the range of the currents to form electric fields.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: May 28, 2019
    Assignee: TREND LIGHTING CORP.
    Inventors: Jonathan Wang, Pei-Chin Hsieh, Pei-Jih Wang, Shih-Chieh Cheng
  • Publication number: 20180047781
    Abstract: A dot matrix light-emitting diode (LED) backlighting light source for a wafer-level microdisplay includes a substrate, multiple LED sets arranged at spaced intervals, a first electrode assembly, and a second electrode assembly. The multiple LED sets have multiple LEDs spaced apart and aligned in a first direction. The first electrode assembly and the second electrode assembly are formed on the multiple LED sets to connect the LEDs of the multiple LED sets in series along the first and second directions to constitute a dot matrix LED light source. Upon manufacture of a wafer-level microdisplay, the dot matrix LED light source can be directly packaged and assembled in a microdisplay, rendering the advantages of compact size and low production cost.
    Type: Application
    Filed: August 8, 2017
    Publication date: February 15, 2018
    Inventors: Jonathan Wang, Peichin Hsieh, Pei-Jih Wang, Jerry Lin
  • Publication number: 20180019573
    Abstract: A surface emitting laser with improved efficiency includes a conductive substrate, a metal bonding layer, a laser structure layer, an epitaxial semiconductor reflection layer, and an electrode layer. The laser structure layer has an epitaxial current-blocking layer having a current opening. Currents are only transmitting through the current opening. The epitaxial current-blocking layer is grown by a semiconductor epitaxy process to confine the range of the currents to form electric fields. Heat dissipation and electrical conduction properties are improved by the conductive substrate. Because the epitaxial current-blocking layer is not made by destructive manufacturing method, the efficiency of the surface emitting laser can be improved.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 18, 2018
    Inventors: Jonathan WANG, Pei-Chin HSIEH, Pei-Jih WANG, Shih-Chieh CHENG
  • Publication number: 20170250315
    Abstract: A dot matrix light-emitting diode (LED) backlighting light source for a wafer-level microdisplay includes a substrate and a bonding layer, multiple LEDs arranged at intervals, a first electrode assembly, and a second electrode assembly sequentially formed on a top surface of the substrate. The first electrode assembly and the second electrode assembly are connected in series to the multiple LEDs to constitute a dot matrix LED light source, which allows to be directly packaged and assembled in a microdisplay in production and is advantageous in reduced size and lower production.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 31, 2017
    Inventors: Jonathan WANG, Peichin HSIEH, Pei-Jih WANG, Shih-Chieh CHENG
  • Patent number: 7199390
    Abstract: This invention is about a window interface layer in a light-emitting diode which comprises an n-type GaAs substrate with an n-type ohmic electrode at the bottom side thereof; an n-type AlGaInP cladding layer formed atop the substrate; an undoped AlGaInP active layer formed atop the n-type cladding layer; a p-AlGaInP cladding layer formed atop the active layer; a p-type window layer made of GaP; a p-type ohmic electrode formed atop the p-type window layer; and a highly doped p-type interface layer made of GaxIn1-xP (0.6?x?0.9) and interposed between the p-type cladding layer and p-type window layer wherein the highly doped p-GaInP interface layer possesses a band gap which is higher than that of the active layer and, however, smaller than that of the p-type cladding layer, and wherein the lattice constant lies between GaAs and GaP.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: April 3, 2007
    Assignee: Arima Optoelectronics Corp.
    Inventors: Pei-Jih Wang, Rupert Wu
  • Publication number: 20070057266
    Abstract: A method of fabricating light emitting diodes (LED) with a colour purifying diffraction lattice (CPDL) is suggested, the essence of the invention is in the use of the coherent scattering of the light by the CPDL for colour purifying of the light emitted by the LED and enhancement its extraction efficiency, the CPDL is a hexagonal two-dimensional periodical pattern on the surface of the LED structure or an internal interface resulting in the periodical variation in the refractive index with the period d The period of CPDL satisfies the equation d=m.lamda./n, where m is a positive integer number, .lamda. is the wavelength of the light generated by LED, and n is the refraction index of LED structure. The height of the hexagonal islands forming CPDL is h=.lamda.(2l+1)/2n, l is a positive integer number or zero. Use of CPDL allows to convert the laterally propagating light into the vertically propagating and simultaneously filter its spectrum.
    Type: Application
    Filed: November 13, 2006
    Publication date: March 15, 2007
    Inventors: Pei-Jih Wang, Pan-Tzu Chang, Wen-Chieh Huang, James Wang, Yury Shreter, Yury Rebane, Ruslan Gorbunov
  • Publication number: 20070045608
    Abstract: This invention is about a window interface layer in a light-emitting diode which comprises an n-type GaAs substrate with an n-type ohmic electrode at the bottom side thereof; an n-type AlGaInP cladding layer formed atop the substrate; an undoped AlGaInP active layer formed atop the n-type cladding layer; a p-AlGaInP cladding layer formed atop the active layer; a p-type window layer made of GaP; a p-type ohmic electrode formed atop the p-type window layer; and a highly doped p-type interface layer made of GaxIn1-xP (0.6?x?0.9) and interposed between the p-type cladding layer and p-type window layer wherein the highly doped p-GaInP interface layer possesses a band gap which is higher than that of the active layer and, however, smaller than that of the p-type cladding layer, and wherein the lattice constant lies between GaAs and GaP.
    Type: Application
    Filed: August 8, 2006
    Publication date: March 1, 2007
    Inventors: Pei-Jih Wang, Rupert Wu
  • Publication number: 20060043398
    Abstract: A method of fabricating light emitting diodes (LED) with a colour purifying diffraction lattice (CPDL) is suggested, the essence of the invention is in the use of the coherent scattering of the light by the CPDL for colour purifying of the light emitted by the LED and enhancement its extraction efficiency, the CPDL is a hexagonal two-dimensional periodical pattern on the surface of the LED structure or an internal interface resulting in the periodical variation in the refractive index with the period d The period of CPDL satisfies the equation d=m?/n, where m is a positive integer number, ? is the wavelength of the light generated by LED, and n is the refraction index of LED structure. The height of the hexagonal islands forming CPDL is h=?(2l+1)/2n, l is a positive integer number or zero. Use of CPDL allows to convert the laterally propagating light into the vertically propagating and simultaneously filter its spectrum.
    Type: Application
    Filed: August 30, 2004
    Publication date: March 2, 2006
    Inventors: Pei-Jih Wang, Pan-Tzu Chang, Wen-Chieh Huang, James Wang, Yury Shreter, Yury Rebane, Ruslan Gorbunov
  • Publication number: 20050093427
    Abstract: A full-color light-emitting diode (LED) having a red LED die, a blue LED die, and a green LED die. The red LED die serves as a supporting material on which the blue LED die and the green LED die are separately mounted in such a manner that the red LED die is not completely covered to reserve a red-light emitting surface. In this way, the red, blue, and green LED die forms a double-layer full-color LED to facilitate the packaging operation, to ensure a more compact mixture of red, green, and blue lights and to achieve an exact wave-mixing effect for obtaining a full-color light.
    Type: Application
    Filed: June 21, 2004
    Publication date: May 5, 2005
    Inventors: Pei-Jih Wang, Pan-Tzu Chang, Andy Huang
  • Patent number: 4801557
    Abstract: Chemical vapor deposition of III-V and II-VI binary, ternary and quaternary compounds is facilitated by maintaining a relatively high flow rate of reactants and modulating the rate of flow by alternately directing the flow at the high rate into a reactor for use and then directing the flow to a vent. Growth rates of the order of 25 Angstroms per minute were achieved in the epitaxial growth of indium phosphide by flow-rate modulation. This produced crystals of device quality having measured carrier mobilities of 2850-3600. In the case of epitaxial growth of ternary and quaternary compounds, improved control of deposition rates is achieved by applying flow-rate modulation to the compound carriers of each of the Group V and VI elements.
    Type: Grant
    Filed: June 23, 1987
    Date of Patent: January 31, 1989
    Assignee: Northwestern University
    Inventors: Bruce W. Wessels, Pei-Jih Wang