Patents by Inventor Pei Yu
Pei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240169614Abstract: A method, computer system, and a computer program product are provided for post-modeling feature evaluation. In one embodiment, at least at least one post model visual output and associated data is obtained that at least includes an individual conditional expectation (ICE) plot and a partial dependence (PDP) plot. Using the associated data and the plots, a Feature Importance (PI) plot is provided. A plurality of features is then determined for each PI, PDP and ICE plots to calculate at least one Interesting Value for each plot. An overall score is also calculated for each plurality of features based on the associated Interesting Values for each PDP, ICE and PI plots. At least one top feature is selected based on said scores. A final plot is then generated at least reflecting the top feature. The final plot combines the PI, PDP and ICE plots together.Type: ApplicationFiled: November 17, 2022Publication date: May 23, 2024Inventors: Xiao Ming Ma, Wen Pei Yu, Jing James Xu, Xue Ying Zhang, Si Er Han, Jing Xu, Jun Wang
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Patent number: 11989398Abstract: Digital content view control is described as leveraging a hierarchical structure of objects defined within the digital content to control how those objects are rendered in a user interface. In one example, a user input is received to display a view of objects within digital content displayed in a user interface. In response, a data query module is configured to fetch data describing a hierarchical structure of the digital content. From this, a z-order determination module determines a z-order of objects included with the digital content. An object view generation module is also configured to generate object views depicting the objects included in the digital content. The object views, once rendered, support an ability to view positioning of objects within the hierarchy.Type: GrantFiled: October 22, 2021Date of Patent: May 21, 2024Assignee: eBay Inc.Inventors: Feng Xie, Pei Wang, Kun Yu, Xiaojie Zang
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Patent number: 11987803Abstract: In various embodiments, method and devices for delivering large cargos (e.g., organelles, chromosomes, bacteria, and the like) into cells are provided. In certain embodiments method of delivering a large cargo into eukaryotic cells, are provided that involve providing eukaryotic cells disposed on one side of a porous membrane; providing the cargo to be delivered in a solution disposed in a reservoir chamber on the opposite side of the porous membrane; and applying pressure to the reservoir chamber sufficient to pass the cargo through pores comprising said porous membrane wherein said cargo passes through cell membranes and into the cells.Type: GrantFiled: October 14, 2019Date of Patent: May 21, 2024Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Ting-Hsiang S. Wu, Pei-Yu E. Chiou, Michael A. Teitell
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Patent number: 11984402Abstract: In an embodiment, a device includes: a first fin; a gate structure over the first fin; a first source/drain region adjacent the gate structure; an etch stop layer over the first source/drain region; a conductive line over the etch stop layer, the conductive line isolated from the first source/drain region by the etch stop layer, a top surface of the conductive line being coplanar with a top surface of the gate structure; and a power rail contact extending through the first fin, the power rail contact connected to the first source/drain region.Type: GrantFiled: July 21, 2022Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Pei-Yu Wang, Yu-Xuan Huang
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Publication number: 20240152418Abstract: A communication system and an operation method thereof are provided. A transmitting device transmits a data unit to a receiving device through a data channel of a communication interface. The transmitting device calculates an original verification information unit of the data unit and synchronously transmits the original verification information unit to the receiving device through a verification information channel of the communication interface based on a transmission timing of the data unit in the data channel. After receiving a current data unit and before receiving a next data unit, the receiving device verifies whether the current data unit received from the data channel has errors in real time based on a current original verification information unit corresponding to the current data unit.Type: ApplicationFiled: November 8, 2022Publication date: May 9, 2024Applicants: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Igor Elkanovich, Yung-Sheng Fang, Pei Yu, Chang-Ming Liu
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Publication number: 20240151707Abstract: A fabric feature predicting method includes following operations: measuring multiple first fabrics to generate multiple first fabric actual feature value groups; storing the first fabric actual feature value groups and multiple first fabric information groups of the first fabrics; selecting multiple third fabrics from the first fabrics according to a second fabric information group of a second fabric; generating at least one equation according to multiple third fabric actual feature value groups of the third fabrics and multiple third fabric information groups of the third fabrics; generating a second fabric predicted feature value group of the second fabric according to the at least one equation and the second fabric information group. The first fabric actual feature value groups include the third fabric actual feature value groups. The first fabric information groups include the third fabric information groups.Type: ApplicationFiled: November 2, 2023Publication date: May 9, 2024Inventors: Hung-Yu LIN, Pei-Te SHEN, Chin-Lun CHU, Tzu-Yu CHIU, Yu-Sian CIOU
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Patent number: 11978641Abstract: A method for manufacturing a semiconductor structure includes: forming a semiconductor device on a main region of the device substrate, the device substrate having a peripheral region surrounding the main region; forming a first filling layer on the peripheral region of the device substrate; forming a second filling layer over the first filling layer and the semiconductor device after forming the first filling layer, the second filling layer having a polishing rate different from that of the first filling layer; performing a planarization process over the second filling layer to remove a portion of the second filling layer so that a remaining portion of the second filling layer has a planarized surface opposite to the device substrate; and bonding the device substrate to a carrier substrate through the first filling layer and the remaining portion of the second filling layer.Type: GrantFiled: June 6, 2022Date of Patent: May 7, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Pei-Yu Chou, Yen-Yu Chen, Meng-Ku Chen, Shiang-Bau Wang, Tze-Liang Lee
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Publication number: 20240139417Abstract: The application describes syringe carriers for medicament delivery devices such as autoinjectors. In particular, a medicament delivery device sub-assembly is described. The medicament delivery device sub-assembly has a housing extending along a longitudinal axis from a proximal end to a distal end, the housing has a tubular section with an internal surface facing towards the axis and an external surface facing away from the axis, wherein the housing has an aperture extending through the tubular section from the internal surface to the external surface; and a housing cover assembly attached in the aperture of the housing, the housing cover assembly being configured to secure a syringe in place relative to the housing.Type: ApplicationFiled: February 4, 2022Publication date: May 2, 2024Inventors: Chia-Hsin Su, Nurettin Ali, Antonio Farieta, Meng-Jhen Chiou, Pei Yu Chao, Jason Mondro
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Publication number: 20240145319Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.Type: ApplicationFiled: January 2, 2024Publication date: May 2, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Tsung-Yu LIN, Pei-Yu WANG, Chung-Wei HSU
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Publication number: 20240145535Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate, an interlayer dielectric (ILD), and a conductive layer. The ILD is disposed on the substrate. The conductive layer is disposed on the substrate and spaced apart from the ILD by an air gap. The ILD is tapered toward the substrate.Type: ApplicationFiled: January 4, 2024Publication date: May 2, 2024Inventors: PEI-YU CHOU, TZE-LIANG LEE
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Patent number: 11969874Abstract: A transmission device for lifting a sickbed contains a first casing, a second casing, a power input assembly, a power output assembly, and multiple screw elements. The first casing includes a first rotatable connection portion, a second rotatable connection portion, a first space, and multiple locking orifices. The second casing includes a third rotatable connection portion, a fourth rotatable connection portion, a second space, and multiple coupling orifices. The power input assembly includes an input shaft and a first bevel gear. The power output assembly includes an output shaft and a second bevel gear. The multiple screw elements are inserted through the multiple coupling orifices of the second casing to screw with the multiple locking orifices of the first casing.Type: GrantFiled: June 17, 2021Date of Patent: April 30, 2024Assignee: NANTONG SHUNLONG PHYSICAL THERAPY EQUIP. CO., LTD.Inventor: Pei-Yu Hsu
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Patent number: 11973027Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.Type: GrantFiled: March 23, 2022Date of Patent: April 30, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Pei-Yu Chou, Jr-Hung Li, Liang-Yin Chen, Su-Hao Liu, Tze-Liang Lee, Meng-Han Chou, Kuo-Ju Chen, Huicheng Chang, Tsai-Jung Ho, Tzu-Yang Ho
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Publication number: 20240130714Abstract: Disclosed are computer-implemented or computer-aided method for diagnosing or predicting the risk of obstructive sleep apnea in a subject. The methods comprise determining whether the subject has obstructive sleep apnea based on at least one quantitative ultrasound parameter and/or at least one morphometric parameter.Type: ApplicationFiled: May 16, 2023Publication date: April 25, 2024Applicant: AMCAD BIOMED CORPORATIONInventors: Argon CHEN, Yi-li LEE, Pei-Yu CHAO, Wei-Hao CHEN, Wei-Yu HSU
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Publication number: 20240128231Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are presented. In embodiments the methods of manufacturing include depositing a first bonding layer on a first substrate, wherein the first substrate comprises a semiconductor substrate and a metallization layer. The first bonding layer and the semiconductor substrate are patterned to form first openings. A second substrate is bonded to the first substrate. After the bonding the second substrate, the second substrate is patterned to form second openings, at least one of the second openings exposing at least one of the first openings. After the patterning the second substrate, a third substrate is bonded to the second substrate, and after the bonding the third substrate, the third substrate is patterned to form third openings, at least one of the third openings exposing at least one of the second openings.Type: ApplicationFiled: January 4, 2023Publication date: April 18, 2024Inventors: Fu Wei Liu, Pei-Wei Lee, Yun-Chung Wu, Bo-Yu Chiu, Szu-Hsien Lee, Mirng-Ji Lii
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Publication number: 20240126067Abstract: A color wheel module and a projector are provided. The projector includes the color wheel module, and the color wheel module includes a disk, an isolation framework, an assembly member, and an adhesive filler. The disk is configured to rotate around an axis. The isolation framework and the assembly member are disposed on the disk. The isolation framework is located between the disk and the assembly member. An air layer is formed between the assembly member and the isolation framework. The adhesive filler is disposed on the assembly member.Type: ApplicationFiled: December 12, 2023Publication date: April 18, 2024Applicant: Coretronic CorporationInventor: Pei-Yu Hsu
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Patent number: 11960167Abstract: A backplane includes: a substrate including a circuit structure layer, a first reflective layer disposed on a bearing surface of the substrate, a plurality of light-emitting diode chips, and a plurality of optical structures. The first reflective layer includes a plurality of through holes spaced apart. A light-emitting diode chip in the plurality of light-emitting diode chips is located in one of the plurality of through holes. The plurality of light-emitting diode chips are electrically connected to the circuit structure layer. The circuit structure layer is configured to drive the plurality of light-emitting diode chips to emit light. An optical structure in the plurality of optical structures covers the light-emitting diode chip, a light incident surface of the optical structure is in contact with a light exit surface of the light-emitting diode chip, and a light exit surface of the optical structure is a curved surface.Type: GrantFiled: February 5, 2021Date of Patent: April 16, 2024Assignees: BOE MLED Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Pei Li, Haiwei Sun, Ming Zhai, Lu Yu, Kangle Chang, Jinpeng Li, Pengjun Cao, Yutao Hao, Shubai Zhang, Shuo Wang, Pei Qin, Zewen Gao, Yali Zhang
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Publication number: 20240120325Abstract: A stacked package structure and a manufacturing method thereof are provided. The stacked package structure includes an upper redistribution layer, a first chip, and an upper molding layer. The first chip is disposed on the upper redistribution layer and is electrically connected to the upper redistribution layer. The upper molding layer is disposed on the first chip and the upper redistribution layer, and is configured to package the first chip. The upper molding layer includes a recess, the recess is recessed relative to a surface of the upper molding layer away from the upper redistribution layer, and the recess is circumferentially formed around a periphery of the upper molding layer.Type: ApplicationFiled: May 31, 2023Publication date: April 11, 2024Applicant: POWERTECH TECHNOLOGY INC.Inventors: Pei-chun TSAI, Hung-hsin HSU, Shang-yu CHANG CHIEN, Chia-ling LEE
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Publication number: 20240117297Abstract: A p-aminobenzoic acid-producing microorganism is provided. The p-aminobenzoic acid-producing microorganism is obtained by a method for preparing a p-aminobenzoic acid-producing microorganism. The method for preparing a p-aminobenzoic acid-producing microorganism includes (a) performing an acclimation process on a source microorganism with at least one sulfonamide antibiotic to obtain at least one acclimatized microorganism and (b) screening out at least one p-aminobenzoic acid-producing microorganism from the at least one acclimatized microorganism, wherein the at least one p-aminobenzoic acid-producing microorganism has a higher p-aminobenzoic acid titer than the source microorganism.Type: ApplicationFiled: December 29, 2022Publication date: April 11, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Pei-Ching CHANG, Jhong-De LIN, Ya-Lin LIN, Hung-Yu LIAO, Hsiang Yuan CHU, Jie-Len HUANG
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Patent number: D1024352Type: GrantFiled: October 24, 2022Date of Patent: April 23, 2024Inventors: Chien-Yu Peng, Pei-Hsiu Kao, Ching-Yu Chang
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Patent number: D1026933Type: GrantFiled: November 13, 2020Date of Patent: May 14, 2024Assignee: GOOGLE LLCInventors: Pei-Ling Feng, Julian Le, Nayon Kim, Felix David Mejia Abreu, Harry Yu, Jason Kearns, Mark Buswell, James Felkins, Alexander Stillwell, Adriana Teresa Olmos Antillon, Matthew Stokes, Andrew Schoneweis