Patents by Inventor Peng-Chun Liou
Peng-Chun Liou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240032274Abstract: A memory device includes a semiconductor substrate. The memory device includes a stack of channel layers over the semiconductor substrate, each channel layer including an oxide material. The memory device includes a word line structure interleaved with the stack of channel layers. The memory device includes a source feature and a drain feature on both sides of the stack of channel layers.Type: ApplicationFiled: January 30, 2023Publication date: January 25, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chun Liou, Chia-En Huang, Ya-Yun Cheng, Chung-Wei Wu
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Publication number: 20240023338Abstract: A semiconductor device includes a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a first lateral direction. The semiconductor device includes third conductive structures each extending along the first lateral direction. The third conductive structures are disposed across the first and second conductive structures. The semiconductor device includes a first semiconductor channel extending along the vertical direction. The first semiconductor channel is disposed between the third conductive structures and the first conductive structure, and between the third conductive structures and the second conductive structure. The first and second conductive structures each have a first varying width along the first lateral direction, and the first semiconductor channel has a second varying width along a second lateral direction.Type: ApplicationFiled: July 28, 2023Publication date: January 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chun Liou, Zhiqiang Wu, Ya-Yun Cheng, Yi-Ching Liu, Meng-Han Lin
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Patent number: 11856783Abstract: A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The first and second conductive structures each have a varying width along the lateral direction. The plurality of third conductive structures have respective different thicknesses in accordance with the varying width of the first and second conductive structures.Type: GrantFiled: August 26, 2021Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Peng-Chun Liou, Ya-Yun Cheng, Yi-Ching Liu, Meng-Han Lin, Chia-En Huang
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Publication number: 20230403859Abstract: A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The first and second conductive structures each have a varying width along the lateral direction. The plurality of third conductive structures have respective different thicknesses in accordance with the varying width of the first and second conductive structures.Type: ApplicationFiled: August 8, 2023Publication date: December 14, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chun Liou, Ya-Yun Cheng, Yi-Ching Liu, Meng-Han Lin, Chia-En Huang
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Publication number: 20230389283Abstract: A method includes: forming an interconnect structure over a substrate, the forming of the interconnect structure includes forming a memory device including a transistor. The forming of the interconnect structure includes: forming a first metallization layer and a second metallization layer over the first metallization layer; forming a gate region of the transistor in at least one of the first and second metallization layers; etching a trench disposed in the second metallization layer and exposing the gate region; depositing a gate dielectric layer in the trench over the gate region; depositing a channel layer in the trench over the gate dielectric layer; and forming two source/drain regions of the transistor over the channel layer on opposite sides of the trench. At least one of the gate region and the channel layer includes two first segments extending in the trench, wherein the first segments are parallel with each other.Type: ApplicationFiled: May 31, 2022Publication date: November 30, 2023Inventors: MENG-HAN LIN, CHIA-EN HUANG, YA-YUN CHENG, PENG-CHUN LIOU
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Publication number: 20230326510Abstract: A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The first and second conductive structures each have a varying width along the lateral direction. The plurality of third conductive structures are configured to be applied with respective different voltages in accordance with the varying width of the first and second conductive structures.Type: ApplicationFiled: June 16, 2023Publication date: October 12, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chun Liou, Zhiqiang Wu, Chung-Wei Wu, Yi-Ching Liu, Yih Wang
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Patent number: 11758734Abstract: A semiconductor device includes a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a first lateral direction. The semiconductor device includes third conductive structures each extending along the first lateral direction. The third conductive structures are disposed across the first and second conductive structures. The semiconductor device includes a first semiconductor channel extending along the vertical direction. The first semiconductor channel is disposed between the third conductive structures and the first conductive structure, and between the third conductive structures and the second conductive structure. The first and second conductive structures each have a first varying width along the first lateral direction, and the first semiconductor channel has a second varying width along a second lateral direction.Type: GrantFiled: August 27, 2021Date of Patent: September 12, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Peng-Chun Liou, Zhiqiang Wu, Ya-Yun Cheng, Yi-Ching Liu, Meng-Han Lin
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Publication number: 20230240063Abstract: A memory cell includes a transistor and a capacitor. The transistor includes a gate electrode, a gate dielectric disposed over the gate electrode, a channel feature disposed over the gate dielectric and overlapping the gate electrode, a source electrode disposed over the channel feature and electrically connected to the capacitor, and two drain electrodes disposed over the channel feature. The drain electrodes are disposed at opposite sides of the source electrode. The channel feature has a first channel portion extending between and interconnecting one drain electrode and the source electrode, and a second channel portion extending between and interconnecting the other drain electrode and the source electrode. The gate electrode overlaps both of the first channel portion and the second channel portion of the channel feature.Type: ApplicationFiled: January 26, 2022Publication date: July 27, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Peng-Chun LIOU, Chia-En HUANG, Ya-Yun CHENG
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Patent number: 11705177Abstract: A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The first and second conductive structures each have a varying width along the lateral direction. The plurality of third conductive structures are configured to be applied with respective different voltages in accordance with the varying width of the first and second conductive structures.Type: GrantFiled: September 9, 2021Date of Patent: July 18, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Peng-Chun Liou, Zhiqiang Wu, Chung-Wei Wu, Yi-Ching Liu, Yih Wang
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Publication number: 20230225130Abstract: A ferroelectric memory device includes a multi-layer stack, a ferroelectric layer, and channel layers. The multi-layer stack is disposed on a substrate and includes conductive layers and dielectric layers stacked alternately. The ferroelectric layer has a curvy profile and is disposed along sidewalls of the conducive layers and sidewalls of the dielectric layers. The channel layers are separated from each other and disposed on the ferroelectric layer, and correspond to the conductive layers respectively.Type: ApplicationFiled: January 10, 2022Publication date: July 13, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chun Liou, Zhiqiang Wu, Chung-Wei Wu, Ya-Yun Cheng
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Publication number: 20220293158Abstract: A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The first and second conductive structures each have a varying width along the lateral direction. The plurality of third conductive structures are configured to be applied with respective different voltages in accordance with the varying width of the first and second conductive structures.Type: ApplicationFiled: September 9, 2021Publication date: September 15, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chun Liou, Zhiqiang Wu, Chung-Wei Wu, Yi-Ching Liu, Yih Wang
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Publication number: 20220285399Abstract: A semiconductor device includes a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a first lateral direction. The semiconductor device includes third conductive structures each extending along the first lateral direction. The third conductive structures are disposed across the first and second conductive structures. The semiconductor device includes a first semiconductor channel extending along the vertical direction. The first semiconductor channel is disposed between the third conductive structures and the first conductive structure, and between the third conductive structures and the second conductive structure. The first and second conductive structures each have a first varying width along the first lateral direction, and the first semiconductor channel has a second varying width along a second lateral direction.Type: ApplicationFiled: August 27, 2021Publication date: September 8, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chun Liou, Zhiqiang Wu, Ya-Yun Cheng, Yi-Ching Liu, Meng-Han Lin
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Publication number: 20220285400Abstract: A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structuring extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The semiconductor device further comprises a first semiconductor channel extending along the vertical direction. The first semiconductor channel is disposed between the plurality of third conductive structures and the first conductive structure and between the plurality of third conductive structures and the second conductive structure.Type: ApplicationFiled: September 9, 2021Publication date: September 8, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chun Liou, Zhiqiang Wu, Chung-Wei Wu, Yi-Ching Liu, Chia-En Huang
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Publication number: 20220285397Abstract: A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The first and second conductive structures each have a varying width along the lateral direction. The plurality of third conductive structures have respective different thicknesses in accordance with the varying width of the first and second conductive structures.Type: ApplicationFiled: August 26, 2021Publication date: September 8, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chun Liou, Ya-Yun Cheng, Yi-Ching Liu, Meng-Han Lin, Chia-En Huang